diff options
| author | Alan Modra <amodra@gmail.com> | 2018-08-20 09:22:28 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2018-08-20 09:54:20 +0930 |
| commit | d203b41ac79b011d63bc1e2467f9c8a81f468eed (patch) | |
| tree | 6cb2b5608231ae991f4521aa209599df9708b40b | |
| parent | ba1c4c6fee7e8794481412fd8604462f04b2765f (diff) | |
| download | gdb-d203b41ac79b011d63bc1e2467f9c8a81f468eed.zip gdb-d203b41ac79b011d63bc1e2467f9c8a81f468eed.tar.gz gdb-d203b41ac79b011d63bc1e2467f9c8a81f468eed.tar.bz2 | |
Tidy bit twiddling
* sh-opc.h (MASK): Simplify.
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | include/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 17 | ||||
| -rw-r--r-- | opcodes/sh-opc.h | 5 |
4 files changed, 18 insertions, 16 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index efb834c..1ad770d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -632,9 +632,9 @@ 2018-06-29 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/tc-aarch64.c (warn_unpredictable_ldst): Add unpredictable - cases for ldxp, stlxrb, stlxrh, stlxr. - * testsuite/gas/aarch64/diagnostic.s: New tests. - * testsuite/gas/aarch64/diagnostic.l: Adjust. + cases for ldxp, stlxrb, stlxrh, stlxr. + * testsuite/gas/aarch64/diagnostic.s: New tests. + * testsuite/gas/aarch64/diagnostic.l: Adjust. 2018-06-29 Tamar Christina <tamar.christina@arm.com> diff --git a/include/ChangeLog b/include/ChangeLog index f663f9b..ab3ff1f 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,6 +1,6 @@ -2018-07-27 John Darrington <john@darrington.wattle.id.au> +2018-07-27 John Darrington <john@darrington.wattle.id.au> - * opcode/s12z.h: New file. + * opcode/s12z.h: New file. 2018-08-09 Richard Earnshaw <rearnsha@arm.com> @@ -19,7 +19,7 @@ Copy over from GCC 2018-07-26 Martin Liska <mliska@suse.cz> - PR lto/86548 + PR lto/86548 * libiberty.h (make_temp_file_with_prefix): New function. 2018-07-30 Jim Wilson <jimw@sifive.com> diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 79f52cf..137e34c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,12 +1,17 @@ -2018-07-28 John Darrington <john@darrington.wattle.id.au> +2018-08-20 Alan Modra <amodra@gmail.com> - * s12z-dis.c (bm_decode): Deal with cases where the mode is BM_RESERVED0 or BM_RESERVED1 - * s12z-dis.c (bm_rel_decode): ditto - * s12z-dis.c (bm_n_bytes): ditto + * sh-opc.h (MASK): Simplify. -2018-07-28 John Darrington <john@darrington.wattle.id.au> +2018-07-28 John Darrington <john@darrington.wattle.id.au> - * s12z.h: Delete. + * s12z-dis.c (bm_decode): Deal with cases where the mode is + BM_RESERVED0 or BM_RESERVED1 + * s12z-dis.c (bm_rel_decode): ditto + * s12z-dis.c (bm_n_bytes): ditto + +2018-07-28 John Darrington <john@darrington.wattle.id.au> + + * s12z.h: Delete. 2018-08-14 H.J. Lu <hongjiu.lu@intel.com> diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h index 13d6056..1ddb36c 100644 --- a/opcodes/sh-opc.h +++ b/opcodes/sh-opc.h @@ -205,10 +205,7 @@ typedef enum sh_dsp_reg_nums; /* Return a mask with bits LO to HI (inclusive) set. */ -#define MASK(LO,HI) ( LO < 1 ? ((1U << (HI + 1)) - 1) \ - : HI > 30 ? (-1U << LO) \ - : LO == HI ? (1U << LO) \ - : (((1U << (HI + 1)) - 1) & (-1U << LO))) +#define MASK(LO,HI) ((1U << (HI) << 1) - (1U << (LO))) #define arch_sh1_base (1 << 0) #define arch_sh2_base (1 << 1) |