diff options
author | Xiao Zeng <zengxiao@eswincomputing.com> | 2022-12-06 14:59:43 +0800 |
---|---|---|
committer | Andrew Burgess <aburgess@redhat.com> | 2022-12-06 10:18:19 +0000 |
commit | c8ea5e409b02cf7fa848e44af74b2e8246ad03f1 (patch) | |
tree | f6e56dda5d6f27de6c200d19ee1f105bef162ba0 | |
parent | 40849d84cbcc7647edf90ab8078d873fab15ffb8 (diff) | |
download | gdb-c8ea5e409b02cf7fa848e44af74b2e8246ad03f1.zip gdb-c8ea5e409b02cf7fa848e44af74b2e8246ad03f1.tar.gz gdb-c8ea5e409b02cf7fa848e44af74b2e8246ad03f1.tar.bz2 |
gdb/riscv: correct dwarf to gdb register number mapping
According to the riscv psabi, the mapping relationship between the
DWARF registers and the machine registers is as follows:
DWARF Number | Register Name | Description
0 - 31 | x0 - x31 | Integer Registers
32 - 63 | f0 - f31 | Floating-point Registers
This is not modelled quite right in riscv_dwarf_reg_to_regnum, the
DWARF register numbers 31 and 63 are not handled correctly due to a
use of '<' instead of '<='. This commit fixes this issue.
-rw-r--r-- | gdb/riscv-tdep.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 0a050b2..a298623 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -3623,10 +3623,10 @@ riscv_add_reggroups (struct gdbarch *gdbarch) static int riscv_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) { - if (reg < RISCV_DWARF_REGNUM_X31) + if (reg <= RISCV_DWARF_REGNUM_X31) return RISCV_ZERO_REGNUM + (reg - RISCV_DWARF_REGNUM_X0); - else if (reg < RISCV_DWARF_REGNUM_F31) + else if (reg <= RISCV_DWARF_REGNUM_F31) return RISCV_FIRST_FP_REGNUM + (reg - RISCV_DWARF_REGNUM_F0); else if (reg >= RISCV_DWARF_FIRST_CSR && reg <= RISCV_DWARF_LAST_CSR) |