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author | Richard Earnshaw <rearnsha@arm.com> | 2024-04-29 14:45:11 +0100 |
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committer | Richard Earnshaw <rearnsha@arm.com> | 2024-05-14 10:56:58 +0100 |
commit | 71afdf2e2645e7123e166834b0344323b0a41ce2 (patch) | |
tree | 5f6e8cf2d3203ba3be5d39720874089c1e5669f1 | |
parent | ad5da6e6d86d5a13ececcd52bf068c42e8024b9c (diff) | |
download | gdb-71afdf2e2645e7123e166834b0344323b0a41ce2.zip gdb-71afdf2e2645e7123e166834b0344323b0a41ce2.tar.gz gdb-71afdf2e2645e7123e166834b0344323b0a41ce2.tar.bz2 |
arm: remove Maverick support from BFD.
Remove the handling of Maverick from BFD. Where appropriate we handle
legacy code by mapping ep9312 onto Armv4t.
-rw-r--r-- | bfd/cpu-arm.c | 70 | ||||
-rw-r--r-- | bfd/elf32-arm.c | 26 | ||||
-rw-r--r-- | include/elf/arm.h | 2 |
3 files changed, 23 insertions, 75 deletions
diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c index 12a5b77..9298c1d 100644 --- a/bfd/cpu-arm.c +++ b/bfd/cpu-arm.c @@ -195,7 +195,6 @@ processors[] = { bfd_mach_arm_8, "xgene1" }, { bfd_mach_arm_8, "xgene2" }, { bfd_mach_arm_9, "cortex-a710" }, - { bfd_mach_arm_ep9312, "ep9312" }, { bfd_mach_arm_iWMMXt, "iwmmxt" }, { bfd_mach_arm_iWMMXt2, "iwmmxt2" }, { bfd_mach_arm_unknown, "arm_any" } @@ -252,24 +251,23 @@ static const bfd_arch_info_type arch_info_struct[] = N (bfd_mach_arm_5T, "armv5t", false, & arch_info_struct[8]), N (bfd_mach_arm_5TE, "armv5te", false, & arch_info_struct[9]), N (bfd_mach_arm_XScale, "xscale", false, & arch_info_struct[10]), - N (bfd_mach_arm_ep9312, "ep9312", false, & arch_info_struct[11]), - N (bfd_mach_arm_iWMMXt, "iwmmxt", false, & arch_info_struct[12]), - N (bfd_mach_arm_iWMMXt2, "iwmmxt2", false, & arch_info_struct[13]), - N (bfd_mach_arm_5TEJ, "armv5tej", false, & arch_info_struct[14]), - N (bfd_mach_arm_6, "armv6", false, & arch_info_struct[15]), - N (bfd_mach_arm_6KZ, "armv6kz", false, & arch_info_struct[16]), - N (bfd_mach_arm_6T2, "armv6t2", false, & arch_info_struct[17]), - N (bfd_mach_arm_6K, "armv6k", false, & arch_info_struct[18]), - N (bfd_mach_arm_7, "armv7", false, & arch_info_struct[19]), - N (bfd_mach_arm_6M, "armv6-m", false, & arch_info_struct[20]), - N (bfd_mach_arm_6SM, "armv6s-m", false, & arch_info_struct[21]), - N (bfd_mach_arm_7EM, "armv7e-m", false, & arch_info_struct[22]), - N (bfd_mach_arm_8, "armv8-a", false, & arch_info_struct[23]), - N (bfd_mach_arm_8R, "armv8-r", false, & arch_info_struct[24]), - N (bfd_mach_arm_8M_BASE, "armv8-m.base", false, & arch_info_struct[25]), - N (bfd_mach_arm_8M_MAIN, "armv8-m.main", false, & arch_info_struct[26]), - N (bfd_mach_arm_8_1M_MAIN, "armv8.1-m.main", false, & arch_info_struct[27]), - N (bfd_mach_arm_9, "armv9-a", false, & arch_info_struct[28]), + N (bfd_mach_arm_iWMMXt, "iwmmxt", false, & arch_info_struct[11]), + N (bfd_mach_arm_iWMMXt2, "iwmmxt2", false, & arch_info_struct[12]), + N (bfd_mach_arm_5TEJ, "armv5tej", false, & arch_info_struct[13]), + N (bfd_mach_arm_6, "armv6", false, & arch_info_struct[14]), + N (bfd_mach_arm_6KZ, "armv6kz", false, & arch_info_struct[15]), + N (bfd_mach_arm_6T2, "armv6t2", false, & arch_info_struct[16]), + N (bfd_mach_arm_6K, "armv6k", false, & arch_info_struct[17]), + N (bfd_mach_arm_7, "armv7", false, & arch_info_struct[18]), + N (bfd_mach_arm_6M, "armv6-m", false, & arch_info_struct[19]), + N (bfd_mach_arm_6SM, "armv6s-m", false, & arch_info_struct[20]), + N (bfd_mach_arm_7EM, "armv7e-m", false, & arch_info_struct[21]), + N (bfd_mach_arm_8, "armv8-a", false, & arch_info_struct[22]), + N (bfd_mach_arm_8R, "armv8-r", false, & arch_info_struct[23]), + N (bfd_mach_arm_8M_BASE, "armv8-m.base", false, & arch_info_struct[24]), + N (bfd_mach_arm_8M_MAIN, "armv8-m.main", false, & arch_info_struct[25]), + N (bfd_mach_arm_8_1M_MAIN, "armv8.1-m.main", false, & arch_info_struct[26]), + N (bfd_mach_arm_9, "armv9-a", false, & arch_info_struct[27]), N (bfd_mach_arm_unknown, "arm_any", false, NULL) }; @@ -306,35 +304,7 @@ bfd_arm_merge_machines (bfd *ibfd, bfd *obfd) /* Otherwise the general principle that a earlier architecture can be linked with a later architecture to produce a binary that will execute - on the later architecture. - - We fail however if we attempt to link a Cirrus EP9312 binary with an - Intel XScale binary, since these architecture have co-processors which - will not both be present on the same physical hardware. */ - else if (in == bfd_mach_arm_ep9312 - && (out == bfd_mach_arm_XScale - || out == bfd_mach_arm_iWMMXt - || out == bfd_mach_arm_iWMMXt2)) - { - /* xgettext: c-format */ - _bfd_error_handler (_("error: %pB is compiled for the EP9312, " - "whereas %pB is compiled for XScale"), - ibfd, obfd); - bfd_set_error (bfd_error_wrong_format); - return false; - } - else if (out == bfd_mach_arm_ep9312 - && (in == bfd_mach_arm_XScale - || in == bfd_mach_arm_iWMMXt - || in == bfd_mach_arm_iWMMXt2)) - { - /* xgettext: c-format */ - _bfd_error_handler (_("error: %pB is compiled for the EP9312, " - "whereas %pB is compiled for XScale"), - obfd, ibfd); - bfd_set_error (bfd_error_wrong_format); - return false; - } + on the later architecture. */ else if (in > out) bfd_set_arch_mach (obfd, bfd_arch_arm, in); /* else @@ -450,7 +420,6 @@ bfd_arm_update_notes (bfd *abfd, const char *note_section) case bfd_mach_arm_5T: expected = "armv5t"; break; case bfd_mach_arm_5TE: expected = "armv5te"; break; case bfd_mach_arm_XScale: expected = "XScale"; break; - case bfd_mach_arm_ep9312: expected = "ep9312"; break; case bfd_mach_arm_iWMMXt: expected = "iWMMXt"; break; case bfd_mach_arm_iWMMXt2: expected = "iWMMXt2"; break; } @@ -501,7 +470,8 @@ architectures[] = { "armv5t", bfd_mach_arm_5T }, { "armv5te", bfd_mach_arm_5TE }, { "XScale", bfd_mach_arm_XScale }, - { "ep9312", bfd_mach_arm_ep9312 }, + /* Maverick extensions have been dropped, so treat this as Armv4T. */ + { "ep9312", bfd_mach_arm_4T }, { "iWMMXt", bfd_mach_arm_iWMMXt }, { "iWMMXt2", bfd_mach_arm_iWMMXt2 }, { "arm_any", bfd_mach_arm_unknown } diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index 2dc6670..ca76bee 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -13892,12 +13892,7 @@ elf32_arm_object_p (bfd *abfd) mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); if (mach == bfd_mach_arm_unknown) - { - if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) - mach = bfd_mach_arm_ep9312; - else - mach = bfd_arm_get_mach_from_attributes (abfd); - } + mach = bfd_arm_get_mach_from_attributes (abfd); bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); return true; @@ -15136,8 +15131,6 @@ elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) if (flags & EF_ARM_VFP_FLOAT) fprintf (file, _(" [VFP float format]")); - else if (flags & EF_ARM_MAVERICK_FLOAT) - fprintf (file, _(" [Maverick float format]")); else fprintf (file, _(" [FPA float format]")); @@ -15158,8 +15151,7 @@ elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI - | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT - | EF_ARM_MAVERICK_FLOAT); + | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT); break; case EF_ARM_EABI_VER1: @@ -20763,20 +20755,6 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) flags_compatible = false; } - if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) - { - if (in_flags & EF_ARM_MAVERICK_FLOAT) - _bfd_error_handler - (_("error: %pB uses %s instructions, whereas %pB does not"), - ibfd, "Maverick", obfd); - else - _bfd_error_handler - (_("error: %pB does not use %s instructions, whereas %pB does"), - ibfd, "Maverick", obfd); - - flags_compatible = false; - } - #ifdef EF_ARM_SOFT_FLOAT if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) { diff --git a/include/elf/arm.h b/include/elf/arm.h index ad1a9a5..01708ef 100644 --- a/include/elf/arm.h +++ b/include/elf/arm.h @@ -35,7 +35,7 @@ #define EF_ARM_OLD_ABI 0x100 #define EF_ARM_SOFT_FLOAT 0x200 #define EF_ARM_VFP_FLOAT 0x400 -#define EF_ARM_MAVERICK_FLOAT 0x800 +/* Removed, was EF_ARM_MAVERICK_FLOAT 0x800 */ /* Frame unwind information */ #define PT_ARM_EXIDX (PT_LOPROC + 1) |