diff options
author | Richard Sandiford <rdsandiford@googlemail.com> | 2006-03-02 15:16:27 +0000 |
---|---|---|
committer | Richard Sandiford <rdsandiford@googlemail.com> | 2006-03-02 15:16:27 +0000 |
commit | 1739bf618dedd47c59e322f14297f6909fca8774 (patch) | |
tree | 5ce1866cd8c49b61854000409497fecb0a92c5b9 | |
parent | 7c4927199c32bfb2f036a4bda8cf7521747b0f37 (diff) | |
download | gdb-1739bf618dedd47c59e322f14297f6909fca8774.zip gdb-1739bf618dedd47c59e322f14297f6909fca8774.tar.gz gdb-1739bf618dedd47c59e322f14297f6909fca8774.tar.bz2 |
ld/testsuite/
* ld-powerpc/vxworks1.ld: Use a page alignment of 0x10000.
* ld-powerpc/vxworks1.dd: Update accordingly.
* ld-powerpc/vxworks1-lib.nd: Likewise.
* ld-powerpc/vxworks1-lib.rd: Likewise.
* ld-powerpc/vxworks1.rd: Likewise.
-rw-r--r-- | ld/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1-lib.nd | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1-lib.rd | 8 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1.dd | 12 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1.ld | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/vxworks1.rd | 20 |
6 files changed, 31 insertions, 23 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index a7dabaf..1e5b950 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,5 +1,13 @@ 2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-powerpc/vxworks1.ld: Use a page alignment of 0x10000. + * ld-powerpc/vxworks1.dd: Update accordingly. + * ld-powerpc/vxworks1-lib.nd: Likewise. + * ld-powerpc/vxworks1-lib.rd: Likewise. + * ld-powerpc/vxworks1.rd: Likewise. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-i386/vxworks1.ld (.data): New section. * ld-i386/vxworks1-lib.s: Add a pointer to a local symbol. * ld-i386/vxworks1-lib.rd: Test for the associated reloc. diff --git a/ld/testsuite/ld-powerpc/vxworks1-lib.nd b/ld/testsuite/ld-powerpc/vxworks1-lib.nd index edf3db3..cbc1c8c 100644 --- a/ld/testsuite/ld-powerpc/vxworks1-lib.nd +++ b/ld/testsuite/ld-powerpc/vxworks1-lib.nd @@ -1,9 +1,9 @@ #... Symbol table '\.dynsym' .*: #... -.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ +.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ #... Symbol table '\.symtab' .*: #... -.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ +.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ #pass diff --git a/ld/testsuite/ld-powerpc/vxworks1-lib.rd b/ld/testsuite/ld-powerpc/vxworks1-lib.rd index 2aaf878..d60e70f 100644 --- a/ld/testsuite/ld-powerpc/vxworks1-lib.rd +++ b/ld/testsuite/ld-powerpc/vxworks1-lib.rd @@ -1,13 +1,13 @@ Relocation section '\.rela\.plt' at offset .* contains 2 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -0008140c .*15 R_PPC_JMP_SLOT 00000000 sexternal \+ 0 -00081410 .*15 R_PPC_JMP_SLOT 00080c48 sglobal \+ 0 +0009040c .*15 R_PPC_JMP_SLOT 00000000 sexternal \+ 0 +00090410 .*15 R_PPC_JMP_SLOT 00080c48 sglobal \+ 0 Relocation section '\.rela\.dyn' at offset .* contains 5 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -00081c00 00000016 R_PPC_RELATIVE * 00080c44 +00090c00 00000016 R_PPC_RELATIVE * 00080c44 00080c0e .*06 R_PPC_ADDR16_HA 00000000 __GOTT_BASE__ \+ 0 00080c12 .*04 R_PPC_ADDR16_LO 00000000 __GOTT_BASE__ \+ 0 00080c16 .*03 R_PPC_ADDR16 00000000 __GOTT_INDEX__ \+ 0 -00081414 .*14 R_PPC_GLOB_DAT 00081800 x \+ 0 +00090414 .*14 R_PPC_GLOB_DAT 00090800 x \+ 0 diff --git a/ld/testsuite/ld-powerpc/vxworks1.dd b/ld/testsuite/ld-powerpc/vxworks1.dd index e4c7b06..09e5a6a 100644 --- a/ld/testsuite/ld-powerpc/vxworks1.dd +++ b/ld/testsuite/ld-powerpc/vxworks1.dd @@ -4,9 +4,9 @@ Disassembly of section \.plt: 00080800 <_PROCEDURE_LINKAGE_TABLE_>: - 80800: 3d 80 00 08 lis r12,8 + 80800: 3d 80 00 09 lis r12,9 80802: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_ - 80804: 39 8c 14 00 addi r12,r12,5120 + 80804: 39 8c 04 00 addi r12,r12,1024 80806: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_ 80808: 80 0c 00 08 lwz r0,8\(r12\) 8080c: 7c 09 03 a6 mtctr r0 @@ -14,9 +14,9 @@ Disassembly of section \.plt: 80814: 4e 80 04 20 bctr 80818: 60 00 00 00 nop 8081c: 60 00 00 00 nop - 80820: 3d 80 00 08 lis r12,8 + 80820: 3d 80 00 09 lis r12,9 80822: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_\+0xc - 80824: 81 8c 14 0c lwz r12,5132\(r12\) + 80824: 81 8c 04 0c lwz r12,1036\(r12\) 80826: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_\+0xc 80828: 7d 89 03 a6 mtctr r12 8082c: 4e 80 04 20 bctr @@ -24,9 +24,9 @@ Disassembly of section \.plt: 80834: 4b ff ff cc b 80800 <_PROCEDURE_LINKAGE_TABLE_> 80838: 60 00 00 00 nop 8083c: 60 00 00 00 nop - 80840: 3d 80 00 08 lis r12,8 + 80840: 3d 80 00 09 lis r12,9 80842: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_\+0x10 - 80844: 81 8c 14 10 lwz r12,5136\(r12\) + 80844: 81 8c 04 10 lwz r12,1040\(r12\) 80846: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_\+0x10 80848: 7d 89 03 a6 mtctr r12 8084c: 4e 80 04 20 bctr diff --git a/ld/testsuite/ld-powerpc/vxworks1.ld b/ld/testsuite/ld-powerpc/vxworks1.ld index 69fe044..979d773 100644 --- a/ld/testsuite/ld-powerpc/vxworks1.ld +++ b/ld/testsuite/ld-powerpc/vxworks1.ld @@ -16,7 +16,7 @@ SECTIONS . = ALIGN (0x400); .text : { *(.text) } - . = ALIGN (0x1000); + . = ALIGN (0x10000); .dynamic : { *(.dynamic) } . = ALIGN (0x400); diff --git a/ld/testsuite/ld-powerpc/vxworks1.rd b/ld/testsuite/ld-powerpc/vxworks1.rd index fd14cfe..27d2404 100644 --- a/ld/testsuite/ld-powerpc/vxworks1.rd +++ b/ld/testsuite/ld-powerpc/vxworks1.rd @@ -1,8 +1,8 @@ Relocation section '\.rela\.plt' at offset .* contains 2 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -0008140c .*15 R_PPC_JMP_SLOT 00080820 sglobal \+ 0 -00081410 .*15 R_PPC_JMP_SLOT 00080840 foo \+ 0 +0009040c .*15 R_PPC_JMP_SLOT 00080820 sglobal \+ 0 +00090410 .*15 R_PPC_JMP_SLOT 00080840 foo \+ 0 Relocation section '\.rela\.text' at offset .* contains 3 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend @@ -12,11 +12,11 @@ Relocation section '\.rela\.text' at offset .* contains 3 entries: Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -00080802 .*06 R_PPC_ADDR16_HA 00081400 _GLOBAL_OFFSET_TABLE_ \+ 0 -00080806 .*04 R_PPC_ADDR16_LO 00081400 _GLOBAL_OFFSET_TABLE_ \+ 0 -00080822 .*06 R_PPC_ADDR16_HA 00081400 _GLOBAL_OFFSET_TABLE_ \+ c -00080826 .*04 R_PPC_ADDR16_LO 00081400 _GLOBAL_OFFSET_TABLE_ \+ c -0008140c .*01 R_PPC_ADDR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 30 -00080842 .*06 R_PPC_ADDR16_HA 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10 -00080846 .*04 R_PPC_ADDR16_LO 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10 -00081410 .*01 R_PPC_ADDR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 50 +00080802 .*06 R_PPC_ADDR16_HA 00090400 _GLOBAL_OFFSET_TABLE_ \+ 0 +00080806 .*04 R_PPC_ADDR16_LO 00090400 _GLOBAL_OFFSET_TABLE_ \+ 0 +00080822 .*06 R_PPC_ADDR16_HA 00090400 _GLOBAL_OFFSET_TABLE_ \+ c +00080826 .*04 R_PPC_ADDR16_LO 00090400 _GLOBAL_OFFSET_TABLE_ \+ c +0009040c .*01 R_PPC_ADDR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 30 +00080842 .*06 R_PPC_ADDR16_HA 00090400 _GLOBAL_OFFSET_TABLE_ \+ 10 +00080846 .*04 R_PPC_ADDR16_LO 00090400 _GLOBAL_OFFSET_TABLE_ \+ 10 +00090410 .*01 R_PPC_ADDR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 50 |