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| author | Lancelot SIX <lsix@lancelotsix.com> | 2021-10-03 15:01:21 +0000 |
|---|---|---|
| committer | Lancelot SIX <lsix@lancelotsix.com> | 2021-10-03 15:01:21 +0000 |
| commit | 0a9bddab0f47d7a09c67528a976022c2196d2dce (patch) | |
| tree | f1e1763bcfe1935593deca4b848245cc63616a23 | |
| parent | 2b014cc535e9d8eeb2203b1f5e9fd5c5e8fb5028 (diff) | |
| download | gdb-0a9bddab0f47d7a09c67528a976022c2196d2dce.zip gdb-0a9bddab0f47d7a09c67528a976022c2196d2dce.tar.gz gdb-0a9bddab0f47d7a09c67528a976022c2196d2dce.tar.bz2 | |
gdb: Fix comment in riscv_scan_prologue
I found an inaccurate comment in riscv_scan_prologue. This commit fixes
it.
| -rw-r--r-- | gdb/riscv-tdep.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index b8844b6..4be8902 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -1947,7 +1947,7 @@ riscv_scan_prologue (struct gdbarch *gdbarch, } else if (insn.opcode () == riscv_insn::ADD) { - /* Handle: addi REG1, REG2, IMM */ + /* Handle: add REG1, REG2, REG3 */ gdb_assert (insn.rd () < RISCV_NUM_INTEGER_REGS); gdb_assert (insn.rs1 () < RISCV_NUM_INTEGER_REGS); gdb_assert (insn.rs2 () < RISCV_NUM_INTEGER_REGS); |