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My proposed change to stop setting TREE_STATIC on constexpr heap
pseudo-variables led to a diagnostic regression because we would get the
generic "not constant" diagnostic before the "allocated storage" diagnostic.
So let's move the generic verify_constant down a bit.
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_outermost_constant_expr): Move
verify_constant later.
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r15-7893 added a workaround for a case where we weren't registering (long)&a
as invalid in a constant-expression, because build_new_1 had folded away the
CONVERT_EXPR that we rely on to diagnose that problem. In general we want
to defer most folding until cp_fold_function, so let's fold less here. We
mainly want to expose constant size so we can treat it differently, and we
already did any constexpr evaluation when initializing cst_outer_nelts, so
fold_to_constant seems like the right choice.
PR c++/118775
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_call_expression): Add assert.
(fold_to_constant): Handle processing_template_decl.
* init.cc (build_new_1): Use fold_to_constant.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/constexpr-new24.C: Adjust diagnostic.
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r11-7740 limited constexpr rejection of conversion from pointer to integer
to manifestly constant-evaluated contexts; it should instead check whether
we're in strict mode.
The comment for that commit noted that making this change regressed other
tests, which turned out to be because maybe_constant_init_1 was not being
properly strict for variables declared constexpr/constinit.
PR c++/99456
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_constant_expression): Check strict
instead of manifestly_const_eval.
(maybe_constant_init_1): Be strict for static constexpr vars.
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In previous patch I miscomputed costs of cvtpd2pf instruction
which mistakely gets accounted as 2 (VEC_PACK_TRUNC_EXPR).
Vectorizer can produce both, but when producing VEC_PACK_TRUNC_EXPR
it use promote_demote patch. This patch thus simplifies
handling of NOP_EXPR since in that case we should always be producing
only one instruction.
PR target/119879
* config/i386/i386.cc (fp_conversion_stmt_cost): Inline to ...
(ix86_vector_costs::add_stmt_cost): ... here; fix handling of NOP_EXPR.
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From: Andrew Bennett <andrew.bennett@imgtec.com>
Firstly, remove the MIPS specific bit of the test.
Secondly, create a MIPS specific version in the gcc.target/mips.
This will only execute for a MIPS ISA less than R6.
Cherry-picked c8b051cdbb1d5b166293513b0360d3d67cf31eb9
from https://github.com/MIPS/gcc
gcc/testsuite
* gcc.dg/memcpy-4.c: Remove mips specific code.
* gcc.target/mips/memcpy-2.c: New test.
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Accept jrc for clear cache intrinsic.
gcc/testsuite
* gcc.target/mips/clear-cache-1.c: Also allow jrc.
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There are no platforms nor simulators for MSA and microMIPS R5 so
turning off this support for now.
gcc/ChangeLog:
* config/mips/mips.cc (mips_option_override): Error out for
-mmicromips -mmsa.
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The optimisation to reduce the result to constant 28 still happens
but only much later in combine.
gcc/testsuite/
* gcc.dg/tree-ssa/ssa-dom-cse-2.c: Do not check output for
MIPS lp64 abi.
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comdat functions [PR119507]
This has been broken since GCC started to put the comdat functions' gcc_except_table into their
own section; r0-118218-g3e6011cfebedfb. What would happen is after a non-comdat function is processed,
the cached value would always be used even for comdat function. Instead we should create a new
section for comdat functions.
OK? Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/119507
gcc/ChangeLog:
* except.cc (switch_to_exception_section): Don't use the cached section if
the current function is in comdat.
gcc/testsuite/ChangeLog:
* g++.dg/eh/pr119507.C: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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So while debugging PR 118320, I found it was useful to have
an assert inside array_slice::begin/end that the array slice isvalid
rather than getting an segfault. This adds an assert that is only
enabled for checking.
OK? Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* vec.h (array_slice::begin): Assert that the
slice is valid.
(array_slice::end): Likewise.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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When FMA is available, N-R step can be rewritten with
a / b = (a - (rcp(b) * a * b)) * rcp(b) + rcp(b) * a
which have 2 fma generated.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_emit_swdivsf): Generate 2
FMA instructions when TARGET_FMA.
gcc/testsuite/ChangeLog:
* gcc.target/i386/recip-vec-divf-fma.c: New test.
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commit 546f28f83ceba74dc8bf84b0435c0159ffca971a
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Mon Apr 7 08:03:46 2025 +0100
simplify-rtx: Fix shortcut for vector eq/ne
fixed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117863
PR target/117863
* gcc.dg/rtl/i386/vector_eq-2.c: New test.
* gcc.dg/rtl/i386/vector_eq-3.c: Likewise.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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..., using the standard idiom. This '*.exp' file doesn't adhere to the
parallel testing protocol as defined in 'gcc/testsuite/lib/gcc-defs.exp'.
This also restores proper behavior for '*.exp' files executing after (!) this
one, which erroneously caused hundreds or even thousands of individual test
cases get duplicated vs. skipped, randomly, depending on the '-jN' level.
PR testsuite/119508
gcc/testsuite/
* rust/compile/nr2/compile.exp: Disable parallel testing.
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Kaiweng's patch to stop freeing riscv_arch_string was correct, but incomplete
as there's another path that was freeing that node, which is just plain wrong
for a node allocated by the GC system.
This patch removes that call to free() which fixes the test. I've spun it in
my tester and will obviously wait for the pre-commit system to render a verdict
before moving forward.
PR target/119865
gcc/
* config/riscv/riscv.cc (parse_features_for_version): Do not
explicitly free the architecture string.
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I'm posting this on behalf of Shreya Munnangi who is working as an intern with
me. I've got her digging into prerequisites for removing mvconst_internal and
would prefer she focus on that rather than our patch process at this time.
--
We can use the orn, xnor, andn instructions on RISC-V to improve the code
generated logical operations when one operand is a constant C where
synthesizing ~C is cheaper than synthesizing C.
This is going to be an N -> N - 1 splitter rather than a define_insn_and_split.
A define_insn_and_split can obviously work, but has multiple undesirable
effects in general.
As a result of implementing as a simple define_split we're not supporting AND
at this time. We need to clean up the mvconst_internal situation first after
which supporting AND is trivial.
This has been tested in Ventana's CI system as well as my tester. Obviously
we'll wait for the pre-commit tester to run before moving forward.
PR target/118410
gcc/
* config/riscv/bitmanip.md (logical with constant argument): New
splitter for cases where synthesizing ~C is cheaper than synthesizing
the original constant C.
gcc/testsuite/
* gcc.target/riscv/pr118410-1.c: New test.
* gcc.target/riscv/pr118410-2.c: Likewise.
Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
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as disucssed, I will proceed adding costs for common SSE operations which are
currently globbed into addss cost, so we do not need to set it incorrectly for
znver5. Looking through the stats, there are quite few missing cases, so I am
starting with those that I think are more common. I plan to do it in smaller
steps so individual changes gets benchmarked by LNT and also can be bisected
to.
This patch adds costs for various SSE and AVX FP->FP conversions (extensions and
truncations). Looking through Agner Fog's tables, these are bit assymetric so I
added cost for CVTSS2SD which is also used for CVTSD2SS, CVTPS2PD and CVTPD2PS,
cost for 256bit VCVTPS2PS (also used for oposite direction) and cost for 512bit
one.
I plan to add int->int conversions next and then int->fp & fp->int which are
more tricky since they may bundle inter-unit move.
I also noticed that size tables are wrong for all SSE instructions so I updated
them. With some love I think vectorization can work as size optimization, too,
but we need more work on that.
Those values I can find in Agner Fog tables are taken from there, other are guesses
(especially for yongfeng_cost and shijidadao_cost).
gcc/ChangeLog:
* config/i386/i386.cc (vec_fp_conversion_cost): New function.
(ix86_rtx_costs): Use it for SSE/AVX FP conversoins.
(ix86_builtin_vectorization_cost): Fix indentation;
and use vec_fp_conversion_cost in vec_promote_demote.
(fp_conversion_stmt_cost): New function.
(ix86_vector_costs::add_stmt_cost): Use it to cost NOP_EXPR
and vec_promote_demote.
* config/i386/i386.h (struct processor_costs):
* config/i386/x86-tune-costs.h (struct processor_costs):
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The problem here is on targets where a 32byte memcpy will use an integral (vector) type
to do the copy and the code will be optimized a different way than expected. This changes
the testcase instead to use a size of 1025 to make sure there is no target that will use an
integral (vector) type for the memcpy and be optimized via the method that was just added.
Pushed as obvious after a test run.
gcc/testsuite/ChangeLog:
* gcc.dg/pr118947-1.c: Use 1025 as the size of the buf.
* gcc.dg/pr78408-3.c: Likewise.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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In a similar way find_split_point handles `a+b*C`, this adds
the split point for `~a & b`. This allows for better instruction
selection when the target has this instruction (aarch64, arm and x86_64
are examples which have this).
Built and tested for aarch64-linux-gnu.
PR rtl-optimization/111949
gcc/ChangeLog:
* combine.cc (find_split_point): Add a split point
for `(and (not X) Y)` if not in the outer set already.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/bic-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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As per architecture, SuperH has a reversed NaN signalling bit
vs IEEE754-2008, it also has a NaN propgation rule similar to
MIPS style.
Use mips style float format and mode for all float types, and
correct sfp-machine header accordingly.
PR target/111814
gcc/ChangeLog:
* config/sh/sh-modes.def (RESET_FLOAT_FORMAT): Use mips format.
(FLOAT_MODE): Use mips mode.
libgcc/ChangeLog:
* config/sh/sfp-machine.h (_FP_NANFRAC_B): Reverse signaling bit.
(_FP_NANFRAC_H): Likewise.
(_FP_NANFRAC_S): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(_FP_KEEPNANFRACP): Enable for target.
(_FP_QNANNEGATEDP): Enable for target.
(_FP_CHOOSENAN): Port from MIPS.
gcc/testsuite/ChangeLog:
* gcc.target/sh/pr111814.c: New test.
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I think it was around PR118574 that I noticed a few cases where we were
unnecessarily wrapping a statement tree in a further EXPR_STMT. Let's avoid
that and also use finish_expr_stmt in a few places in the coroutines code
that were building EXPR_STMT directly.
gcc/cp/ChangeLog:
* coroutines.cc (coro_build_expr_stmt)
(coro_build_cvt_void_expr_stmt): Remove.
(build_actor_fn): Use finish_expr_stmt.
* semantics.cc (finish_expr_stmt): Avoid wrapping statement in
EXPR_STMT.
(finish_stmt_expr_expr): Add comment.
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In determination of base block alignment we only examine a COMPONENT_REF
tree node at hand without ever checking if its ultimate alignment has
been reduced by the combined offset going back to the outermost object.
Consequently cases have been observed where quadword accesses have been
produced for a memory location referring a nested struct member only
aligned to the longword boundary, causing emulation to trigger.
Address this issue by recursing into COMPONENT_REF tree nodes until the
outermost one has been reached, which is supposed to be a MEM_REF one,
accumulating the offset as we go, fixing a commit e0dae4da4c45 ("Alpha:
Also use tree information to get base block alignment") regression.
Bail out and refrain from using tree information for alignment if we end
up at something different or we are unable to calculate the offset at
any point.
gcc/
* config/alpha/alpha.cc
(alpha_get_mem_rtx_alignment_and_offset): Recurse into
COMPONENT_REF nodes.
gcc/testsuite/
* gcc.target/alpha/memcpy-nested-offset-long.c: New file.
* gcc.target/alpha/memcpy-nested-offset-quad.c: New file.
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PR fortran/119836
gcc/fortran/ChangeLog:
* resolve.cc (check_pure_function): Fix checking for
an impure subprogram within a DO CONCURRENT construct.
(pure_subroutine): Ditto.
gcc/testsuite/ChangeLog:
* gfortran.dg/do_concurrent_all_clauses.f90: Remove invalid
dg-error test.
* gfortran.dg/pr119836_1.f90: New test.
* gfortran.dg/pr119836_2.f90: New test.
* gfortran.dg/pr119836_3.f90: New test.
* gfortran.dg/pr119836_4.f90: New test.
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This progresses:
PASS: cobol.dg/group2/FUNCTION_DATE___TIME_OMNIBUS.cob -O0 (test for excess errors)
[-FAIL:-]{+PASS:+} cobol.dg/group2/FUNCTION_DATE___TIME_OMNIBUS.cob -O0 execution test
[Etc.]
PR cobol/119818
gcc/testsuite/
* cobol.dg/group2/FUNCTION_DATE___TIME_OMNIBUS.cob:
'dg-set-target-env-var TZ UTC0'.
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RISC-V has the ability to extract a single bit out of a register from a fixed
or variable position.
While looking at 502.gcc a little while ago I realize that we failed to use
bext inside bitmap_bit_p for its return value.
The core "problem" is that the RISC-V does not define SHIFT_COUNT_TRUNCATED
(for good reasons). As a result the target is largely responsible for handling
elimination of shift count/bit position masking.
There's a follow-up patch I've been working on with an intern to improve
detection of bext in more cases. This one stands independently though and is
probably the most important of the missed cases.
Will push to the trunk assuming pre-commit testing is green. It's already been
through my tester as well as Ventana's internal testing.
gcc
* config/riscv/bitmanip.md (*bext<mode>_mask_pos): New pattern
for extracting a single bit at masked bit position.
gcc/testsuite
* gcc.target/riscv/bext-ext-2.c: New test
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Test for expected PE values.
Signed-off-by: Jonathan Yong <10walls@gmail.com>
gcc/testsuite/ChangeLog:
* g++.dg/abi/ref-temp1.C: Replicate some test based on
PE expectations.
* lib/target-supports.exp: New check_effective_target_pe.
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This is the second part of the PR which comes from transformation
of memset into either stores of 0 (via an integral type) or stores
of {}. We already handle stores of `{}`, this just extends that to
handle of the constant 0 and treat it similarly.
PR tree-optimization/87901
gcc/ChangeLog:
* tree-ssa-dse.cc (maybe_trim_constructor_store): Add was_integer_cst argument.
Check for was_integer_cst instead of `{}` when was_integer_cst is true.
(maybe_trim_partially_dead_store): Handle INTEGER_CST stores of 0 as stores of `{}`.
Udpate call to maybe_trim_constructor_store for CONSTRUCTOR.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/ssa-dse-53.c: New test.
* gcc.dg/tree-ssa/ssa-dse-54.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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DSE has support for trimming memset (and memset like) statements.
In this case we have `MEM <unsigned char[17]> [(char * {ref-all})&z] = {};` in
the IR and when we go to trim it, we call build_fold_addr_expr which leaves around
a cast from one pointer type to another. This is due to build_fold_addr_expr
being generic but in gimple you don't need these casts.
PR tree-optimization/87901
gcc/ChangeLog:
* tree-ssa-dse.cc (maybe_trim_constructor_store): Strip over useless type
conversions after taking the address of the MEM_REF.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/ssa-dse-52.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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So unlike constants, address invariants are currently put first if
used with a SSA NAME.
It would be better if address invariants are consistent with constants
and this patch changes that.
gcc.dg/tree-ssa/pr118902-1.c is an example where this canonicalization
can help. In it if `p` variable was a global variable, FRE (VN) would have figured
it out that `a` could never be equal to `&p` inside the loop. But without the
canonicalization we end up with `&p == a.0_1` which VN does try to handle for conditional
VN.
Bootstrapped and tested on x86_64.
PR tree-optimization/118902
gcc/ChangeLog:
* fold-const.cc (tree_swap_operands_p): Place invariants in the first operand
if not used with constants.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr118902-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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aliasing says the ref is a may clobber. [PR118947]
The case here is we have:
```
char buf[32] = {};
void* ret = aaa();
__builtin_memcpy(ret, buf, 32);
```
And buf does not escape. But we don't prop the zeroing from buf to the memcpy statement
because optimize_memcpy_to_memset only looks back one statement. This can be fixed to look back
until we get an statement that may clobber the reference. If we get a phi node, then we don't do
anything.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/118947
gcc/ChangeLog:
* gimple-fold.cc (optimize_memcpy_to_memset): Walk back until we get a
statement that may clobber the read.
gcc/testsuite/ChangeLog:
* gcc.dg/pr118947-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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While looking into PR 118947, I noticed that optimize_memcpy_to_memset didn't
handle STRING_CST which are also used for a memset of 0 but for char arrays.
This fixes that and improves optimize_memcpy_to_memset to handle that case.
This fixes part of PR 118947 but not the whole thing; we still need to skip over
vdefs in some cases.
Boostrapped and tested on x86_64-linux-gnu.
PR tree-optimization/78408
PR tree-optimization/118947
gcc/ChangeLog:
* gimple-fold.cc (optimize_memcpy_to_memset): Handle STRING_CST case too.
gcc/testsuite/ChangeLog:
* gcc.dg/pr78408-3.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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R_C6000_EHTYPE relocations are implemented as GOT-indirect relocations,
but, as specified by the C6000 EABI (SPRAB89A), 13.5.1 Relocation Types,
they are a special case of SBR (static base relocation).
gcc/
* config/c6x/c6x.h (ASM_PREFERRED_EH_DATA_FORMAT): Remove the
DW_EH_PE_indirect flag.
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The test case assumes that alignof(int)=sizeof(int). But for some
targets this is not valid. For example, for PRU target,
alignof(int)=1 but sizeof(int)=4.
Fix the test case to align to twice the size of int, as the expected
dg-error messages suggest.
This patch fixes the test failures for PRU target.
gcc/testsuite/ChangeLog:
* gcc.dg/pr116357.c: Use sizeof(int) instead of alignof(int).
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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The recent PFA early-break vectorization fix left us with a POINTER_PLUS
and non-sizetype offset.
PR tree-optimization/119858
* tree-vect-loop.cc (vectorizable_live_operation): Convert
pointer offset to sizetype.
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This produces a toolchain that can successfully build binaries targeting
riscv*-gnu.
gcc/ChangeLog:
* config.gcc: Recognize riscv*-*-gnu* targets.
* config/riscv/gnu.h: New file.
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[PR108016]
It fixes one of the PR108016 mis-optimization.
The patch adjusts expanding for __builtin_add/sub_overflow() on RV64 targets
to avoid unnecessary sext.w instructions.
It replaces expanded for ADD/SUB_OVERFLOW code:
r141:SI=r139:DI#0+r140:DI#0 .. r143:DI=sign_extend(r141:SI)
to the followong kind of chain ->
r143:DI=sign_extend(r139:DI#0+r140:DI#0) .. r141:SI=r143:DI#0
so that sign_extend(a:SI+b:SI) to be emitted as addw (or subw) instruction,
while output r141:SI register will be placed at the end of chain without
extra dependencies, and thus could be easily optimized-out by further pipeline.
PR middle-end/108016
gcc/ChangeLog:
* config/riscv/riscv.md (addv<mode>4, uaddv<mode>4, subv<mode>4,
usubv<mode>4): Tunes for unnecessary sext.w elimination.
PR middle-end/108016
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr108016.c: New test.
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In the case that we are eliminating the load instruction, we use zero_extend
for the initialization of the base register for the zero-offset store.
This causes issues when the store and the load use the same mode,
as we are trying to generate a zero_extend with the same inner and
outer modes.
This patch fixes the issue by zero-extending the value stored in the
base register only when the load's mode is wider than the store's mode.
PR rtl-optimization/119160
gcc/ChangeLog:
* avoid-store-forwarding.cc (process_store_forwarding):
Zero-extend the value stored in the base register, in case
of load-elimination, only when the mode of the destination
is wider.
gcc/testsuite/ChangeLog:
* gcc.dg/pr119160.c: New test.
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The documentation for the REG_EH_REGION could easily be read
(especially by non-native speakers) to indicate that it should be
attached to insn at the destination of an excpetion edge. Despite the
original text saying that the note "specifies the destination," it is
actually always attached to the source instruction.
This updates the documentation to make it clear that the REG_EH_REGION
note is always attached to instructions originating an exception edge
and that the value of the note specifies where the exception edge
leads to.
Co-Developed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
gcc/ChangeLog:
* doc/cfg.texi: Update the exception handling section for the
REG_EH_REGION notes to make it clear that the note is attached
to the instruction throwing the exception.
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The set of {dg-do-what-default} to 'run' may lead some test hang
during make check.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/loongarch-vector.exp: Change
{dg-do-what-default} save and restore logical.
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attribute
The build_target_option_node() function may return a cached node when
fndecl having the same effective global_options. Therefore, freeing
memory used in target nodes can lead to a use-after-free issue, as a
target node may be shared by multiple fndecl.
This issue occurs in gcc.target/riscv/target-attr-16.c, where all
functions have the same march, but the last function tries to free its
old x_riscv_arch_string (which is shared) when processing the second
target attribute.However, the behavior of this issue depends on how the
OS handles malloc. It's very likely that xstrdup returns the old address
just freed, coincidentally hiding the issue. We can verify the issue by
forcing xstrdup to return a new address, e.g.,
- if (opts->x_riscv_arch_string != default_opts->x_riscv_arch_string)
- free (CONST_CAST (void *, (const void *) opts->x_riscv_arch_string));
+ // Force it to use a new address, NFCI
+ const char *tmp = opts->x_riscv_arch_string;
opts->x_riscv_arch_string = xstrdup (local_arch_str);
+ if (tmp != default_opts->x_riscv_arch_string)
+ free (CONST_CAST (void *, (const void *) tmp));
This patch replaces xstrdup with ggc_strdup and let gc to take care of
unused strings.
gcc/ChangeLog:
* config/riscv/riscv-target-attr.cc
(riscv_target_attr_parser::update_settings):
Do not manually free any arch string.
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I thought this diagnostic could be clearer that the problem is the
combination of virtual bases and constexpr constructor, not just complain
that the class has virtual bases without context.
gcc/cp/ChangeLog:
* constexpr.cc (is_valid_constexpr_fn): Improve diagnostic.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/constexpr-dtor16.C: Adjust diagnostic.
* g++.dg/cpp2a/constexpr-dynamic10.C: Likewise.
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gcc/
* tree.def (BOOLEAN_TYPE): Add more details.
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Presenting the allocation location as the location of the outermost
expression we're trying to evaluate is inaccurate; let's provide both
locations.
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_outermost_constant_expr): Give both
expression and allocation location in allocated storage diagnostics.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1y/constexpr-new.C: Adjust diagnostics.
* g++.dg/cpp1z/constexpr-asm-5.C: Likewise.
* g++.dg/cpp26/static_assert1.C: Likewise.
* g++.dg/cpp2a/constexpr-dtor7.C: Likewise.
* g++.dg/cpp2a/constexpr-new26.C: Likewise.
* g++.dg/cpp2a/constexpr-new3.C: Likewise.
* g++.dg/cpp2a/constinit14.C: Likewise.
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A couple of cleanups from noticing that the semantics of
std::vector<T>::reserve() (request the new minimum allocation) differ from
the GCC vec<...>::reserve() (request a minimum number of slots available).
In preserve_state, we were tripling the size of the vec when doubling it is
more than enough.
In get_tinfo_desc we were using vec_safe_reserve properly, but it's
simpler to use vec_safe_grow_cleared.
gcc/cp/ChangeLog:
* name-lookup.cc (name_lookup::preserve_state): Fix reserve call.
* rtti.cc (get_tinfo_desc): Use vec_safe_grow_cleared.
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While looking at pack-indexing16.C I thought it would be helpful to print
the problematic type/value.
gcc/cp/ChangeLog:
* semantics.cc (finish_type_pack_element): Add more info
to diagnostics.
libstdc++-v3/ChangeLog:
* testsuite/20_util/tuple/element_access/get_neg.cc: Adjust
diagnostic.
gcc/testsuite/ChangeLog:
* g++.dg/cpp26/pack-indexing2.C: Adjust diagnostics.
* g++.dg/ext/type_pack_element2.C: Likewise.
* g++.dg/ext/type_pack_element4.C: Likewise.
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In the PR118629 testcase, pushdecl_outermost_localscope was failing and
returning error_mark_node without ever actually giving an error; in addition
to my earlier fix for the failure, make sure failures aren't silent.
gcc/cp/ChangeLog:
* decl.cc (cp_make_fname_decl): Prevent silent failure.
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We were giving a generic "not declared" error for a requires-expression
without concepts enabled; we can do better.
gcc/cp/ChangeLog:
* lex.cc (unqualified_name_lookup_error): Handle 'requires' better.
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