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path: root/gcc/config/rs6000/rs6000.cc
AgeCommit message (Expand)AuthorFilesLines
5 daysrs6000: Avoid undefined behavior caused by overflow and invalid shiftsKishan Parmar1-10/+15
8 daysMove STMT_VINFO_TYPE to SLP_TREE_TYPERichard Biener1-7/+9
12 daysvect: Add is_gather_scatter argument to misalignment hook.Robin Dapp1-1/+10
2025-06-12Refactor record_function_versions.Alfie Richards1-29/+6
2025-05-26rs6000: Remove include of reload.hSegher Boessenkool1-1/+0
2025-05-16Automatic replacement of get_insns/end_sequence pairsRichard Sandiford1-2/+1
2025-04-22rs6000: Ignore OPTION_MASK_SAVE_TOC_INDIRECT differences in inlining decision...Jakub Jelinek1-4/+7
2025-03-17rs6000: Add -msplit-patch-nops (PR112980)Michael Matz1-4/+23
2025-01-02Update copyright years.Jakub Jelinek1-1/+1
2024-12-06Support for 64-bit location_t: RTL partsLewis Hyatt1-10/+15
2024-12-06diagnostics: UX: add doc URLs for attributes (v2)David Malcolm1-0/+3
2024-11-28rs6000: Add PowerPC inline asm redzone clobber supportJakub Jelinek1-0/+21
2024-11-22build: Remove INCLUDE_MEMORY [PR117737]Andrew Pinski1-1/+0
2024-11-21rs6000: Remove ISA_3_0_MASKS_IEEE and check P9_VECTOR insteadKewen Lin1-3/+2
2024-11-21rs6000: Simplify some conditions or code related to TARGET_DIRECT_MOVEKewen Lin1-2/+2
2024-11-15rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p5Kewen Lin1-24/+44
2024-11-15rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p4Kewen Lin1-70/+17
2024-11-15rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p3Kewen Lin1-20/+10
2024-11-15rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p2Kewen Lin1-23/+9
2024-11-15rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p1Kewen Lin1-28/+9
2024-11-15rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p4Kewen Lin1-20/+4
2024-11-15rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p3Kewen Lin1-5/+4
2024-11-15rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p2Kewen Lin1-12/+8
2024-11-15rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p1Kewen Lin1-16/+31
2024-10-25gcc: Remove trailing whitespaceJakub Jelinek1-21/+21
2024-09-10Pass host specific ABI opts from mkoffload.Prathamesh Kulkarni1-2/+2
2024-08-29Use std::unique_ptr for optinfo_itemDavid Malcolm1-0/+1
2024-08-23optabs-query: Use opt_machine_mode for smallest_int_mode_for_size [PR115495].Robin Dapp1-1/+1
2024-08-12rs6000: ROP - Do not disable shrink-wrapping for leaf functions [PR114759]Peter Bergner1-4/+0
2024-07-23report message for operator %a on unaddressible operandJiufu Guo1-1/+6
2024-07-23rs6000: Update option set in rs6000_inner_target_options [PR115713]Kewen Lin1-1/+2
2024-07-23rs6000: Consider explicitly set options in target option parsing [PR115713]Kewen Lin1-2/+5
2024-07-23rs6000: Escalate warning to error for VSX with explicit no-altivec etc.Kewen Lin1-18/+23
2024-07-22Add -mcpu=power11 support.Michael Meissner1-8/+24
2024-07-18rs6000: Fix .machine cpu selection w/ altivec [PR97367]René Rebe1-1/+4
2024-07-17rs6000: Change optab for ibm128 and ieee128 conversionKewen Lin1-6/+6
2024-07-17rs6000: Make all 128 bit scalar FP modes have 128 bit precision [PR112993]Kewen Lin1-7/+2
2024-07-16rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [P...Peter Bergner1-0/+12
2024-07-12rs6000: Remove vcond{,u} expandersKewen Lin1-1/+1
2024-07-07rs6000: Consider explicit VSX when masking off ALTIVEC [PR115688]Kewen Lin1-2/+6
2024-06-26rs6000: Fix wrong RTL patterns for vector merge high/low short on LEKewen Lin1-4/+4
2024-06-26rs6000: Fix wrong RTL patterns for vector merge high/low char on LEKewen Lin1-4/+4
2024-06-25rs6000: Properly default-disable late-combine passes [PR106594, PR115622, PR1...Thomas Schwinge1-8/+8
2024-06-25Replace {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE with new hook mode_for_floating_typeKewen Lin1-0/+16
2024-06-24Add a late-combine pass [PR106594]Richard Sandiford1-0/+8
2024-06-20rs6000: Fix wrong RTL patterns for vector merge high/low word on LEKewen Lin1-4/+4
2024-05-20rs6000: Add assert !TARGET_VSX if !TARGET_ALTIVEC and strip a useless checkKewen Lin1-2/+3
2024-05-20rs6000: Fix ICE on IEEE128 long double without vsx [PR114402]Kewen Lin1-2/+2
2024-05-14rs6000: Enable overlapped by-pieces operationsHaochen Gui1-0/+3
2024-04-12rs6000: Add OPTION_MASK_POWER8 [PR101865]Will Schmidt1-4/+3
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