diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 241 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/ada/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/analyzer/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/combine.cc | 40 | ||||
-rw-r--r-- | gcc/cp/ChangeLog | 30 | ||||
-rw-r--r-- | gcc/cp/module.cc | 7 | ||||
-rw-r--r-- | gcc/po/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 114 | ||||
-rw-r--r-- | gcc/testsuite/g++.dg/modules/dguide-7_a.C | 9 | ||||
-rw-r--r-- | gcc/testsuite/g++.dg/modules/dguide-7_b.C | 10 | ||||
-rw-r--r-- | gcc/testsuite/g++.dg/modules/dguide-7_c.C | 12 | ||||
-rw-r--r-- | gcc/tree-vect-slp.cc | 6 | ||||
-rw-r--r-- | gcc/tree-vect-stmts.cc | 88 |
14 files changed, 490 insertions, 93 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a2bb7c25..ac8a2c6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,244 @@ +2025-04-30 Andrew Pinski <quic_apinski@quicinc.com> + + PR target/120042 + * tree-vectorizer.h: Include dominance.h. + +2025-04-30 David Malcolm <dmalcolm@redhat.com> + + * prime-paths.cc (limit_checked_add): Remove redundant trailing + ';'. + (enters_through_p): Likewise. + +2025-04-30 David Malcolm <dmalcolm@redhat.com> + + * diagnostic-format-sarif.cc + (sarif_serialization_format_json::write_to_file): New. + (sarif_builder::m_formatted): Replace field with... + (sarif_builder::m_serialization_format): ...this. + (sarif_builder::sarif_builder): Update for field change. + (sarif_builder::flush_to_file): Call m_serialization_format's + write_to_file vfunc. + (sarif_output_format::sarif_output_format): Replace param + "formatted" with "serialization_format". + (sarif_stream_output_format::sarif_output_format): Likewise. + (sarif_file_output_format::sarif_file_output_format): Likewise. + (diagnostic_output_format_init_sarif_stderr): Make a + sarif_serialization_format_json and pass it to + diagnostic_output_format_init_sarif. + (diagnostic_output_format_open_sarif_file): Split out into... + (diagnostic_output_file::try_to_open): ...this, adding + "serialization_kind" param. + (diagnostic_output_format_init_sarif_file): Update for new param + to diagnostic_output_format_open_sarif_file. Make a + sarif_serialization_format_json and pass it to + diagnostic_output_format_init_sarif. + (diagnostic_output_format_init_sarif_stream): Make a + sarif_serialization_format_json and pass it to + diagnostic_output_format_init_sarif. + (make_sarif_sink): Replace param "formatted" with "serialization". + (selftest::test_make_location_object): Update for changes to + sarif_builder ctor. + * diagnostic-format-sarif.h (enum class sarif_serialization): New. + (diagnostic_output_format_open_sarif_file): Add param + "serialization_kind". + (class sarif_serialization_format): New. + (class sarif_serialization_format_json): New. + (make_sarif_sink): Replace param "formatted" with + "serialization_format". + * diagnostic-output-file.h (diagnostic_output_file::try_to_open): + New decl. + * diagnostic.h (enum diagnostics_output_format): Tweak comments. + * doc/invoke.texi (-fdiagnostics-add-output): Add "serialization" + param to sarif scheme. + * libgdiagnostics.cc (sarif_sink::sarif_sink): Update for change + to make_sarif_sink. + * opts-diagnostic.cc (sarif_scheme_handler::make_sink): Add + "serialization" param and pass it on to make_sarif_sink. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/119960 + * tree-vect-slp.cc (vect_schedule_slp_node): Sanity + check dominance check on operand defs. + +2025-04-30 Richard Biener <rguenther@suse.de> + + Revert: + 2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/119960 + * tree-vect-slp.cc (vect_slp_can_convert_to_external): + Handle cases where defs from multiple BBs are ordered + by their dominance relation. + +2025-04-30 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (get_later_stmt): Robustify against + stmts in different BBs, assert when they are unordered. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/119960 + * tree-vect-slp.cc (vect_slp_can_convert_to_external): + Handle cases where defs from multiple BBs are ordered + by their dominance relation. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR ipa/120006 + * tree-ssa-structalias.cc (find_func_clobbers): Handle + strdup, strndup, realloc, index, strchr, strrchr, memchr, + strstr, strpbrk builtins like find_func_aliases does. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/120003 + * tree-ssa-threadbackward.cc (back_threader::find_paths_to_names): + Allow block re-use but do not enlarge the path beyond such a + re-use. + +2025-04-30 Georg-Johann Lay <avr@gjlay.de> + + Backported from master: + 2025-04-30 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.md (xload_<mode>_libgcc): Clobber R21, Z. + +2025-04-30 Kito Cheng <kito.cheng@sifive.com> + + PR target/119832 + * config/riscv/riscv.cc (riscv_dynamic_frm_mode_p): New. + (riscv_mode_confluence): New. + (TARGET_MODE_CONFLUENCE): Define to riscv_mode_confluence. + +2025-04-30 Jerry Zhang Jian <jerry.zhangjian@sifive.com> + + * common/config/riscv/riscv-common.cc: Add Zve32x depends on Zicsr + +2025-04-30 Jennifer Schmitz <jschmitz@nvidia.com> + + * config/aarch64/aarch64.cc (aarch64_emit_sve_pred_move): + Fold LD1/ST1 with ptrue to LDR/STR for 128-bit VLS. + +2025-04-30 yulong <shiyulong@iscas.ac.cn> + + * config/riscv/constraints.md (Ou01): New constraint. + (Ou02): Ditto. + * config/riscv/generic-vector-ooo.md (vec_sf_vcp): New reservation. + * config/riscv/genrvv-type-indexer.cc (main): New type. + * config/riscv/riscv-c.cc (riscv_pragma_intrinsic): Add xsfvcp strings. + * config/riscv/riscv-vector-builtins-shapes.cc (struct sf_vcix_se_def): + New function. + (struct sf_vcix_def): Ditto. + (SHAPE): Ditto. + * config/riscv/riscv-vector-builtins-shapes.h: Ditto. + * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_X2_U_OPS): New type. + (DEF_RVV_X2_WU_OPS): Ditto. + (vuint8mf8_t): Ditto. + (vuint8mf4_t): Ditto. + (vuint8mf2_t): Ditto. + (vuint8m1_t): Ditto. + (vuint8m2_t): Ditto. + (vuint8m4_t): Ditto. + (vuint16mf4_t): Ditto. + (vuint16mf2_t): Ditto. + (vuint16m1_t): Ditto. + (vuint16m2_t): Ditto. + (vuint16m4_t): Ditto. + (vuint32mf2_t): Ditto. + (vuint32m1_t): Ditto. + (vuint32m2_t): Ditto. + (vuint32m4_t): Ditto. + * config/riscv/riscv-vector-builtins.cc (DEF_RVV_X2_U_OPS): New builtins + def. + (DEF_RVV_X2_WU_OPS): Ditto. + (rvv_arg_type_info::get_scalar_float_type): Ditto. + (function_instance::modifies_global_state_p): Ditto. + * config/riscv/riscv-vector-builtins.def (v_x): New base type. + (i): Ditto. + (v_i): Ditto. + (xv): Ditto. + (iv): Ditto. + (fv): Ditto. + (vvv): Ditto. + (xvv): Ditto. + (ivv): Ditto. + (fvv): Ditto. + (vvw): Ditto. + (xvw): Ditto. + (ivw): Ditto. + (fvw): Ditto. + (v_vv): Ditto. + (v_xv): Ditto. + (v_iv): Ditto. + (v_fv): Ditto. + (v_vvv): Ditto. + (v_xvv): Ditto. + (v_ivv): Ditto. + (v_fvv): Ditto. + (v_vvw): Ditto. + (v_xvw): Ditto. + (v_ivw): Ditto. + (v_fvw): Ditto. + (x2_vector): Ditto. + (scalar_float): Ditto. + * config/riscv/riscv-vector-builtins.h (enum required_ext): New extension. + (required_ext_to_isa_name): Ditto. + (required_extensions_specified): Ditto. + (struct rvv_arg_type_info): Ditto. + (struct function_group_info): Ditto. + * config/riscv/riscv.md: New attr. + * config/riscv/sifive-vector-builtins-bases.cc (class sf_vc): New function. + (BASE): New base_name. + * config/riscv/sifive-vector-builtins-bases.h: New function_base. + * config/riscv/sifive-vector-builtins-functions.def + (REQUIRED_EXTENSIONS): New intrinsics def. + (sf_vc): Ditto. + * config/riscv/sifive-vector.md (@sf_vc_x_se<mode>): New RTL mode. + (@sf_vc_v_x_se<mode>): Ditto. + (@sf_vc_v_x<mode>): Ditto. + (@sf_vc_i_se<mode>): Ditto. + (@sf_vc_v_i_se<mode>): Ditto. + (@sf_vc_v_i<mode>): Ditto. + (@sf_vc_vv_se<mode>): Ditto. + (@sf_vc_v_vv_se<mode>): Ditto. + (@sf_vc_v_vv<mode>): Ditto. + (@sf_vc_xv_se<mode>): Ditto. + (@sf_vc_v_xv_se<mode>): Ditto. + (@sf_vc_v_xv<mode>): Ditto. + (@sf_vc_iv_se<mode>): Ditto. + (@sf_vc_v_iv_se<mode>): Ditto. + (@sf_vc_v_iv<mode>): Ditto. + (@sf_vc_fv_se<mode>): Ditto. + (@sf_vc_v_fv_se<mode>): Ditto. + (@sf_vc_v_fv<mode>): Ditto. + (@sf_vc_vvv_se<mode>): Ditto. + (@sf_vc_v_vvv_se<mode>): Ditto. + (@sf_vc_v_vvv<mode>): Ditto. + (@sf_vc_xvv_se<mode>): Ditto. + (@sf_vc_v_xvv_se<mode>): Ditto. + (@sf_vc_v_xvv<mode>): Ditto. + (@sf_vc_ivv_se<mode>): Ditto. + (@sf_vc_v_ivv_se<mode>): Ditto. + (@sf_vc_v_ivv<mode>): Ditto. + (@sf_vc_fvv_se<mode>): Ditto. + (@sf_vc_v_fvv_se<mode>): Ditto. + (@sf_vc_v_fvv<mode>): Ditto. + (@sf_vc_vvw_se<mode>): Ditto. + (@sf_vc_v_vvw_se<mode>): Ditto. + (@sf_vc_v_vvw<mode>): Ditto. + (@sf_vc_xvw_se<mode>): Ditto. + (@sf_vc_v_xvw_se<mode>): Ditto. + (@sf_vc_v_xvw<mode>): Ditto. + (@sf_vc_ivw_se<mode>): Ditto. + (@sf_vc_v_ivw_se<mode>): Ditto. + (@sf_vc_v_ivw<mode>): Ditto. + (@sf_vc_fvw_se<mode>): Ditto. + (@sf_vc_v_fvw_se<mode>): Ditto. + (@sf_vc_v_fvw<mode>): Ditto. + * config/riscv/vector-iterators.md: New iterator. + * config/riscv/vector.md: New vtype. + 2025-04-29 Jan Hubicka <hubicka@ucw.cz> * ipa-cp.cc (cs_interesting_for_ipcp_p): Fix handling of uninitialized diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 2848e61..c95ab32 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250430 +20250501 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 5ec1e24..9911402 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,15 @@ +2025-04-30 Eric Botcazou <ebotcazou@adacore.com> + + PR ada/112958 + * Makefile.rtl (LIBGNAT_TARGET_PAIRS) [x86 FreeBSD]: Add specific + version of s-dorepr.adb. + * libgnat/s-dorepr__freebsd.adb: New file. + +2025-04-30 Eric Botcazou <ebotcazou@adacore.com> + + PR ada/112958 + * init.c (__gnat_error_handler) [__FreeBSD__]: Fix typo. + 2025-04-27 H.J. Lu <hjl.tools@gmail.com> PR middle-end/112877 diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog index 40d1ff1..186f355 100644 --- a/gcc/analyzer/ChangeLog +++ b/gcc/analyzer/ChangeLog @@ -1,3 +1,9 @@ +2025-04-30 David Malcolm <dmalcolm@redhat.com> + + * sm-malloc.cc (malloc_diagnostic::describe_state_change): Tweak + the "EXPR is NULL" message for the case where EXPR is a null + pointer. + 2025-04-29 Marc Poulhiès <dkm@kataplop.net> * exploded-graph.h (set_status): Rename parameter. diff --git a/gcc/combine.cc b/gcc/combine.cc index 873c2bd..67cf044 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -4020,34 +4020,34 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0, in i3, so we need to make sure that we won't wrongly hoist a SET to i2 that would conflict with a death note present in there, or would have its dest modified or used between i2 and i3. */ - if (!modified_between_p (SET_SRC (set1), i2, i3) - && !(REG_P (SET_DEST (set1)) - && find_reg_note (i2, REG_DEAD, SET_DEST (set1))) - && !(GET_CODE (SET_DEST (set1)) == SUBREG - && find_reg_note (i2, REG_DEAD, - SUBREG_REG (SET_DEST (set1)))) - && SET_DEST (set1) != pc_rtx - && !reg_used_between_p (SET_DEST (set1), i2, i3) + if ((set_noop_p (set1) + || (!modified_between_p (SET_SRC (set1), i2, i3) + && !(REG_P (SET_DEST (set1)) + && find_reg_note (i2, REG_DEAD, SET_DEST (set1))) + && !(GET_CODE (SET_DEST (set1)) == SUBREG + && find_reg_note (i2, REG_DEAD, + SUBREG_REG (SET_DEST (set1)))) + && SET_DEST (set1) != pc_rtx + && !reg_used_between_p (SET_DEST (set1), i2, i3))) /* If I3 is a jump, ensure that set0 is a jump so that we do not create invalid RTL. */ - && (!JUMP_P (i3) || SET_DEST (set0) == pc_rtx) - ) + && (!JUMP_P (i3) || SET_DEST (set0) == pc_rtx)) { newi2pat = set1; newpat = set0; } - else if (!modified_between_p (SET_SRC (set0), i2, i3) - && !(REG_P (SET_DEST (set0)) - && find_reg_note (i2, REG_DEAD, SET_DEST (set0))) - && !(GET_CODE (SET_DEST (set0)) == SUBREG - && find_reg_note (i2, REG_DEAD, - SUBREG_REG (SET_DEST (set0)))) - && SET_DEST (set0) != pc_rtx - && !reg_used_between_p (SET_DEST (set0), i2, i3) + else if ((set_noop_p (set0) + || (!modified_between_p (SET_SRC (set0), i2, i3) + && !(REG_P (SET_DEST (set0)) + && find_reg_note (i2, REG_DEAD, SET_DEST (set0))) + && !(GET_CODE (SET_DEST (set0)) == SUBREG + && find_reg_note (i2, REG_DEAD, + SUBREG_REG (SET_DEST (set0)))) + && SET_DEST (set0) != pc_rtx + && !reg_used_between_p (SET_DEST (set0), i2, i3))) /* If I3 is a jump, ensure that set1 is a jump so that we do not create invalid RTL. */ - && (!JUMP_P (i3) || SET_DEST (set1) == pc_rtx) - ) + && (!JUMP_P (i3) || SET_DEST (set1) == pc_rtx)) { newi2pat = set0; newpat = set1; diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 480e9c4..a74c74d 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,33 @@ +2025-04-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/120023 + * module.cc (depset::hash::find_dependencies): Also call + add_deduction_guides when walking one. + +2025-04-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/119938 + * pt.cc (get_template_parm_object): When !check_init, add assert + that expr really is constant and mark decl as such. + +2025-04-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/119551 + PR c++/119996 + * module.cc (depset::hash::make_dependency): Also mark inline + variables referencing TU-local values as exposures here. + (depset::hash::finalize_dependencies): Add error message for + inline variables. + +2025-04-30 Patrick Palka <ppalka@redhat.com> + + PR c++/119981 + PR c++/119378 + * pt.cc (tsubst) <case UNBOUND_CLASS_TEMPLATE>: Substitute + into template parameter list first. When substituting the + context, only set processing_template_decl if there's more + than one level of introduced template parameters. + 2025-04-28 David Malcolm <dmalcolm@redhat.com> * parser.cc: Include "analyzer/analyzer-language.h". diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc index 7e3b24e..f562bf8 100644 --- a/gcc/cp/module.cc +++ b/gcc/cp/module.cc @@ -14823,9 +14823,16 @@ depset::hash::find_dependencies (module_state *module) } walker.end (); + /* If we see either a class template or a deduction guide, make + sure to add all visible deduction guides. We need to check + both in case they have been added in separate modules, or + one is in the GMF and would have otherwise been discarded. */ if (!is_key_order () && DECL_CLASS_TEMPLATE_P (decl)) add_deduction_guides (decl); + if (!is_key_order () + && deduction_guide_p (decl)) + add_deduction_guides (TYPE_NAME (TREE_TYPE (TREE_TYPE (decl)))); if (!is_key_order () && TREE_CODE (decl) == TEMPLATE_DECL diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index 96da438..a9ed995 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,9 @@ +2025-04-30 Joseph Myers <josmyers@redhat.com> + + * be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po, + ja.po, ka.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, + zh_CN.po, zh_TW.po: Update. + 2025-04-23 Joseph Myers <josmyers@redhat.com> * gcc.pot: Regenerate. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b196daf..aa5d296 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,117 @@ +2025-04-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/120023 + * g++.dg/modules/dguide-7_a.C: New test. + * g++.dg/modules/dguide-7_b.C: New test. + * g++.dg/modules/dguide-7_c.C: New test. + +2025-04-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/119938 + * g++.dg/modules/tpl-nttp-2_a.H: New test. + * g++.dg/modules/tpl-nttp-2_b.C: New test. + +2025-04-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/119551 + PR c++/119996 + * g++.dg/modules/internal-13.C: New test. + +2025-04-30 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/107017 + * c-c++-common/analyzer/sprintf-3.c: New test, covering use of + sprintf with specific format strings. Doesn't yet find problems + as the analyzer doesn't yet understand the format strings. + +2025-04-30 David Malcolm <dmalcolm@redhat.com> + + * c-c++-common/analyzer/data-model-path-1.c: Check for + "using NULL here" message. + * c-c++-common/analyzer/null-deref-pr108251-smp_fetch_ssl_fc_has_early.c: + Likewise. Check for "return of NULL" message. + * c-c++-common/analyzer/null-deref-pr108400-SoftEtherVPN-WebUi.c: + Likewise. + * gcc.dg/analyzer/data-model-5.c: Likewise. + * gcc.dg/analyzer/data-model-5b.c: Likewise. + * gcc.dg/analyzer/data-model-5c.c: Likewise. + * gcc.dg/analyzer/torture/pr93647.c: Likewise. + +2025-04-30 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/pr115258.c: Add -mcmodel=small. + +2025-04-30 Patrick Palka <ppalka@redhat.com> + + PR c++/119981 + PR c++/119378 + * g++.dg/cpp2a/lambda-targ15.C: New test. + +2025-04-30 Richard Biener <rguenther@suse.de> + + Revert: + 2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/119960 + * gcc.dg/vect/bb-slp-pr119960-1.c: New testcase. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/119960 + * gcc.dg/vect/bb-slp-pr119960-1.c: New testcase. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR ipa/120006 + * gcc.dg/torture/pr120006.c: New testcase. + +2025-04-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/120003 + * gcc.dg/tree-ssa/ssa-thread-23.c: New testcase. + * gcc.dg/tree-ssa/ssa-dom-thread-7.c: Adjust. + +2025-04-30 Georg-Johann Lay <avr@gjlay.de> + + Backported from master: + 2025-04-30 Georg-Johann Lay <avr@gjlay.de> + + * gcc.target/avr/torture/pr119989.h: New file. + * gcc.target/avr/torture/pr119989-memx-1.c: New test. + * gcc.target/avr/torture/pr119989-memx-2.c: New test. + * gcc.target/avr/torture/pr119989-memx-3.c: New test. + * gcc.target/avr/torture/pr119989-memx-4.c: New test. + * gcc.target/avr/torture/pr119989-flashx-1.c: New test. + * gcc.target/avr/torture/pr119989-flashx-2.c: New test. + * gcc.target/avr/torture/pr119989-flashx-3.c: New test. + * gcc.target/avr/torture/pr119989-flashx-4.c: New test. + +2025-04-30 Kito Cheng <kito.cheng@sifive.com> + + PR target/119832 + * g++.target/riscv/pr119832.C: New test. + +2025-04-30 Jerry Zhang Jian <jerry.zhangjian@sifive.com> + + * gcc.target/riscv/predef-19.c: set the march to rv64im_zve32x + instead of rv64gc_zve32x to avoid Zicsr implied by g. Extra m is + added to avoid current 'V' extension requires 'M' extension + +2025-04-30 Jennifer Schmitz <jschmitz@nvidia.com> + + * gcc.target/aarch64/sve/ldst_ptrue_128_to_neon.c: New test. + * gcc.target/aarch64/sve/cond_arith_6.c: Adjust expected outcome. + * gcc.target/aarch64/sve/pcs/return_4_128.c: Likewise. + * gcc.target/aarch64/sve/pcs/return_5_128.c: Likewise. + * gcc.target/aarch64/sve/pcs/struct_3_128.c: Likewise. + +2025-04-30 yulong <shiyulong@iscas.ac.cn> + + * gcc.target/riscv/rvv/xsfvector/sf_vc_f.c: New test. + * gcc.target/riscv/rvv/xsfvector/sf_vc_i.c: New test. + * gcc.target/riscv/rvv/xsfvector/sf_vc_v.c: New test. + * gcc.target/riscv/rvv/xsfvector/sf_vc_x.c: New test. + 2025-04-29 Pengfei Li <Pengfei.Li2@arm.com> * gcc.target/aarch64/simd/bic_orn_1.c: New file. diff --git a/gcc/testsuite/g++.dg/modules/dguide-7_a.C b/gcc/testsuite/g++.dg/modules/dguide-7_a.C new file mode 100644 index 0000000..8d0eb80 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/dguide-7_a.C @@ -0,0 +1,9 @@ +// PR c++/120023 +// { dg-additional-options "-fmodules" } +// { dg-module-cmi M.S } + +export module M.S; + +namespace ns { + export template <typename T> struct S; +} diff --git a/gcc/testsuite/g++.dg/modules/dguide-7_b.C b/gcc/testsuite/g++.dg/modules/dguide-7_b.C new file mode 100644 index 0000000..85246b2 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/dguide-7_b.C @@ -0,0 +1,10 @@ +// PR c++/120023 +// { dg-additional-options "-fmodules" } +// { dg-module-cmi M.D } + +export module M.D; +import M.S; + +namespace ns { + S(int) -> S<int>; +} diff --git a/gcc/testsuite/g++.dg/modules/dguide-7_c.C b/gcc/testsuite/g++.dg/modules/dguide-7_c.C new file mode 100644 index 0000000..9579d9d --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/dguide-7_c.C @@ -0,0 +1,12 @@ +// PR c++/120023 +// { dg-additional-options "-fmodules" } + +import M.S; +import M.D; + +template <> struct ns::S<int> { S(int) {} }; + +int main() { + ns::S s(123); + ns::S<int> s2 = s; +} diff --git a/gcc/tree-vect-slp.cc b/gcc/tree-vect-slp.cc index b5a9604..9bf142d 100644 --- a/gcc/tree-vect-slp.cc +++ b/gcc/tree-vect-slp.cc @@ -11361,12 +11361,12 @@ vect_remove_slp_scalar_calls (vec_info *vinfo, { if (!stmt_info) continue; + if (!PURE_SLP_STMT (stmt_info)) + continue; + stmt_info = vect_orig_stmt (stmt_info); gcall *stmt = dyn_cast <gcall *> (stmt_info->stmt); if (!stmt || gimple_bb (stmt) == NULL) continue; - if (is_pattern_stmt_p (stmt_info) - || !PURE_SLP_STMT (stmt_info)) - continue; lhs = gimple_call_lhs (stmt); if (lhs) new_stmt = gimple_build_assign (lhs, build_zero_cst (TREE_TYPE (lhs))); diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc index 38612a1..42b6059 100644 --- a/gcc/tree-vect-stmts.cc +++ b/gcc/tree-vect-stmts.cc @@ -5528,7 +5528,6 @@ vectorizable_conversion (vec_info *vinfo, tree vec_dest, cvt_op = NULL_TREE; tree scalar_dest; tree op0, op1 = NULL_TREE; - loop_vec_info loop_vinfo = dyn_cast <loop_vec_info> (vinfo); tree_code tc1; code_helper code, code1, code2; code_helper codecvt1 = ERROR_MARK, codecvt2 = ERROR_MARK; @@ -5538,7 +5537,7 @@ vectorizable_conversion (vec_info *vinfo, poly_uint64 nunits_in; poly_uint64 nunits_out; tree vectype_out, vectype_in; - int ncopies, i; + int i; tree lhs_type, rhs_type; /* For conversions between floating point and integer, there're 2 NARROW cases. NARROW_SRC is for FLOAT_EXPR, means @@ -5605,7 +5604,7 @@ vectorizable_conversion (vec_info *vinfo, /* Check types of lhs and rhs. */ scalar_dest = gimple_get_lhs (stmt); lhs_type = TREE_TYPE (scalar_dest); - vectype_out = STMT_VINFO_VECTYPE (stmt_info); + vectype_out = SLP_TREE_VECTYPE (slp_node); /* Check the operands of the operation. */ slp_tree slp_op0, slp_op1 = NULL; @@ -5703,20 +5702,6 @@ vectorizable_conversion (vec_info *vinfo, modifier = WIDEN; } - /* Multiple types in SLP are handled by creating the appropriate number of - vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in - case of SLP. */ - if (slp_node) - ncopies = 1; - else if (modifier == NARROW_DST) - ncopies = vect_get_num_copies (loop_vinfo, vectype_out); - else - ncopies = vect_get_num_copies (loop_vinfo, vectype_in); - - /* Sanity check: make sure that at least one copy of the vectorized stmt - needs to be generated. */ - gcc_assert (ncopies >= 1); - bool found_mode = false; scalar_mode lhs_mode = SCALAR_TYPE_MODE (lhs_type); scalar_mode rhs_mode = SCALAR_TYPE_MODE (rhs_type); @@ -5871,16 +5856,11 @@ vectorizable_conversion (vec_info *vinfo, else if (code == FLOAT_EXPR) { wide_int op_min_value, op_max_value; - if (slp_node) - { - tree def; - /* ??? Merge ranges in case of more than one lane. */ - if (SLP_TREE_LANES (slp_op0) != 1 - || !(def = vect_get_slp_scalar_def (slp_op0, 0)) - || !vect_get_range_info (def, &op_min_value, &op_max_value)) - goto unsupported; - } - else if (!vect_get_range_info (op0, &op_min_value, &op_max_value)) + tree def; + /* ??? Merge ranges in case of more than one lane. */ + if (SLP_TREE_LANES (slp_op0) != 1 + || !(def = vect_get_slp_scalar_def (slp_op0, 0)) + || !vect_get_range_info (def, &op_min_value, &op_max_value)) goto unsupported; cvt_type @@ -5916,9 +5896,8 @@ vectorizable_conversion (vec_info *vinfo, if (!vec_stmt) /* transformation not required. */ { - if (slp_node - && (!vect_maybe_update_slp_op_vectype (slp_op0, vectype_in) - || !vect_maybe_update_slp_op_vectype (slp_op1, vectype_in))) + if (!vect_maybe_update_slp_op_vectype (slp_op0, vectype_in) + || !vect_maybe_update_slp_op_vectype (slp_op1, vectype_in)) { if (dump_enabled_p ()) dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, @@ -5929,16 +5908,14 @@ vectorizable_conversion (vec_info *vinfo, if (modifier == NONE) { STMT_VINFO_TYPE (stmt_info) = type_conversion_vec_info_type; - vect_model_simple_cost (vinfo, stmt_info, - ncopies * (1 + multi_step_cvt), + vect_model_simple_cost (vinfo, stmt_info, (1 + multi_step_cvt), dt, ndts, slp_node, cost_vec); } else if (modifier == NARROW_SRC || modifier == NARROW_DST) { STMT_VINFO_TYPE (stmt_info) = type_demotion_vec_info_type; /* The final packing step produces one vector result per copy. */ - unsigned int nvectors - = (slp_node ? SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node) : ncopies); + unsigned int nvectors = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); vect_model_promotion_demotion_cost (stmt_info, dt, nvectors, multi_step_cvt, cost_vec, widen_arith); @@ -5950,9 +5927,7 @@ vectorizable_conversion (vec_info *vinfo, per copy. MULTI_STEP_CVT is 0 for a single conversion, so >> MULTI_STEP_CVT divides by 2^(number of steps - 1). */ unsigned int nvectors - = (slp_node - ? SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node) >> multi_step_cvt - : ncopies * 2); + = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node) >> multi_step_cvt; vect_model_promotion_demotion_cost (stmt_info, dt, nvectors, multi_step_cvt, cost_vec, widen_arith); @@ -5963,8 +5938,7 @@ vectorizable_conversion (vec_info *vinfo, /* Transform. */ if (dump_enabled_p ()) - dump_printf_loc (MSG_NOTE, vect_location, - "transform conversion. ncopies = %d.\n", ncopies); + dump_printf_loc (MSG_NOTE, vect_location, "transform conversion.\n"); if (op_type == binary_op) { @@ -6003,23 +5977,10 @@ vectorizable_conversion (vec_info *vinfo, widen_or_narrow_float_p ? vectype_out : cvt_type); - int ninputs = 1; - if (!slp_node) - { - if (modifier == WIDEN) - ; - else if (modifier == NARROW_SRC || modifier == NARROW_DST) - { - if (multi_step_cvt) - ninputs = vect_pow2 (multi_step_cvt); - ninputs *= 2; - } - } - switch (modifier) { case NONE: - vect_get_vec_defs (vinfo, stmt_info, slp_node, ncopies, + vect_get_vec_defs (vinfo, stmt_info, slp_node, 1, op0, vectype_in, &vec_oprnds0); /* vec_dest is intermediate type operand when multi_step_cvt. */ if (multi_step_cvt) @@ -6046,10 +6007,7 @@ vectorizable_conversion (vec_info *vinfo, gimple_set_lhs (new_stmt, new_temp); vect_finish_stmt_generation (vinfo, stmt_info, new_stmt, gsi); - if (slp_node) - slp_node->push_vec_def (new_stmt); - else - STMT_VINFO_VEC_STMTS (stmt_info).safe_push (new_stmt); + slp_node->push_vec_def (new_stmt); } break; @@ -6058,7 +6016,7 @@ vectorizable_conversion (vec_info *vinfo, of elements that we can fit in a vectype (nunits), we have to generate more than one vector stmt - i.e - we need to "unroll" the vector stmt by a factor VF/nunits. */ - vect_get_vec_defs (vinfo, stmt_info, slp_node, ncopies * ninputs, + vect_get_vec_defs (vinfo, stmt_info, slp_node, 1, op0, vectype_in, &vec_oprnds0, code == WIDEN_LSHIFT_EXPR ? NULL_TREE : op1, vectype_in, &vec_oprnds1); @@ -6102,10 +6060,7 @@ vectorizable_conversion (vec_info *vinfo, else new_stmt = SSA_NAME_DEF_STMT (vop0); - if (slp_node) - slp_node->push_vec_def (new_stmt); - else - STMT_VINFO_VEC_STMTS (stmt_info).safe_push (new_stmt); + slp_node->push_vec_def (new_stmt); } break; @@ -6115,7 +6070,7 @@ vectorizable_conversion (vec_info *vinfo, of elements that we can fit in a vectype (nunits), we have to generate more than one vector stmt - i.e - we need to "unroll" the vector stmt by a factor VF/nunits. */ - vect_get_vec_defs (vinfo, stmt_info, slp_node, ncopies * ninputs, + vect_get_vec_defs (vinfo, stmt_info, slp_node, 1, op0, vectype_in, &vec_oprnds0); /* Arguments are ready. Create the new vector stmts. */ if (cvt_type && modifier == NARROW_DST) @@ -6148,16 +6103,11 @@ vectorizable_conversion (vec_info *vinfo, /* This is the last step of the conversion sequence. Store the vectors in SLP_NODE or in vector info of the scalar statement (or in STMT_VINFO_RELATED_STMT chain). */ - if (slp_node) - slp_node->push_vec_def (new_stmt); - else - STMT_VINFO_VEC_STMTS (stmt_info).safe_push (new_stmt); + slp_node->push_vec_def (new_stmt); } } break; } - if (!slp_node) - *vec_stmt = STMT_VINFO_VEC_STMTS (stmt_info)[0]; vec_oprnds0.release (); vec_oprnds1.release (); |