diff options
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 1130 |
1 files changed, 476 insertions, 654 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a0f1a93..c0b7aab 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -266,9 +266,9 @@ in the following sections. -Wnoexcept -Wnoexcept-type -Wnon-virtual-dtor -Wpessimizing-move -Wno-placement-new -Wplacement-new=@var{n} -Wrange-loop-construct -Wredundant-move -Wredundant-tags --Wreorder -Wregister +-Wreorder -Wregister -Wno-sfinae-incomplete -Wstrict-null-sentinel -Wno-subobject-linkage -Wtemplates --Wno-non-template-friend -Wold-style-cast +-Wno-non-c-typedef-for-linkage -Wno-non-template-friend -Wold-style-cast -Woverloaded-virtual -Wno-pmf-conversions -Wself-move -Wsign-promo -Wsized-deallocation -Wsuggest-final-methods -Wsuggest-final-types -Wsuggest-override -Wno-template-body @@ -312,7 +312,7 @@ Objective-C and Objective-C++ Dialects}. -fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} -fdiagnostics-color=@r{[}auto@r{|}never@r{|}always@r{]} -fdiagnostics-urls=@r{[}auto@r{|}never@r{|}always@r{]} --fdiagnostics-format=@r{[}text@r{|}sarif-stderr@r{|}sarif-file@r{|}json@r{|}json-stderr@r{|}json-file@r{]} +-fdiagnostics-format=@r{[}text@r{|}sarif-stderr@r{|}sarif-file@r{]} -fdiagnostics-add-output=@var{DIAGNOSTICS-OUTPUT-SPEC} -fdiagnostics-set-output=@var{DIAGNOSTICS-OUTPUT-SPEC} -fno-diagnostics-json-formatting @@ -322,6 +322,9 @@ Objective-C and Objective-C++ Dialects}. -fno-diagnostics-show-cwe -fno-diagnostics-show-rules -fno-diagnostics-show-highlight-colors +-fno-diagnostics-show-nesting +-fno-diagnostics-show-nesting-locations +-fdiagnostics-show-nesting-levels -fdiagnostics-minimum-margin-width=@var{width} -fdiagnostics-parseable-fixits -fdiagnostics-generate-patch -fdiagnostics-show-template-tree -fno-elide-type @@ -331,7 +334,8 @@ Objective-C and Objective-C++ Dialects}. -fdiagnostics-column-unit=@r{[}display@r{|}byte@r{]} -fdiagnostics-column-origin=@var{origin} -fdiagnostics-escape-format=@r{[}unicode@r{|}bytes@r{]} --fdiagnostics-text-art-charset=@r{[}none@r{|}ascii@r{|}unicode@r{|}emoji@r{]}} +-fdiagnostics-text-art-charset=@r{[}none@r{|}ascii@r{|}unicode@r{|}emoji@r{]} +-fdiagnostics-show-context@r{[}=@var{depth}@r{]}} @item Warning Options @xref{Warning Options,,Options to Request or Suppress Warnings}. @@ -340,7 +344,7 @@ Objective-C and Objective-C++ Dialects}. -w -Wextra -Wall -Wabi=@var{n} -Waddress -Wno-address-of-packed-member -Waggregate-return -Walloc-size -Walloc-size-larger-than=@var{byte-size} -Walloc-zero --Walloca -Walloca-larger-than=@var{byte-size} +-Walloca -Walloca-larger-than=@var{byte-size} -Wauto-profile -Wno-aggressive-loop-optimizations -Warith-conversion -Warray-bounds -Warray-bounds=@var{n} -Warray-compare @@ -353,7 +357,7 @@ Objective-C and Objective-C++ Dialects}. -Wno-builtin-macro-redefined -Wc90-c99-compat -Wc99-c11-compat -Wc11-c23-compat -Wc23-c2y-compat -Wc++-compat -Wc++11-compat -Wc++14-compat -Wc++17-compat --Wc++20-compat +-Wc++20-compat -Wc++26-compat -Wno-c++11-extensions -Wno-c++14-extensions -Wno-c++17-extensions -Wno-c++20-extensions -Wno-c++23-extensions -Wcalloc-transposed-args @@ -388,6 +392,7 @@ Objective-C and Objective-C++ Dialects}. -Winit-self -Winline -Wno-int-conversion -Wint-in-bool-context -Wno-int-to-pointer-cast -Wno-invalid-memory-model -Winvalid-pch -Winvalid-utf8 -Wno-unicode -Wjump-misses-init +-Wkeyword-macro -Wlarger-than=@var{byte-size} -Wleading-whitespace=@var{kind} -Wlogical-not-parentheses -Wlogical-op -Wlong-long -Wno-lto-type-mismatch -Wmain -Wmaybe-uninitialized @@ -433,7 +438,8 @@ Objective-C and Objective-C++ Dialects}. -Wunsuffixed-float-constants -Wunterminated-string-initialization -Wunused --Wunused-but-set-parameter -Wunused-but-set-variable +-Wunused-but-set-parameter -Wunused-but-set-parameter=@var{n} +-Wunused-but-set-variable -Wunused-but-set-variable=@var{n} -Wunused-const-variable -Wunused-const-variable=@var{n} -Wunused-function -Wunused-label -Wunused-local-typedefs -Wunused-macros @@ -573,7 +579,7 @@ Objective-C and Objective-C++ Dialects}. -fmin-function-alignment=[@var{n}] -fno-allocation-dce -fallow-store-data-races -fassociative-math -fauto-profile -fauto-profile[=@var{path}] --fauto-inc-dec -fbranch-probabilities +-fauto-profile-inlining -fauto-inc-dec -fbranch-probabilities -fcaller-saves -fcombine-stack-adjustments -fconserve-stack -ffold-mem-offsets @@ -914,7 +920,7 @@ Objective-C and Objective-C++ Dialects}. @emph{AVR Options} (@ref{AVR Options}) @gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args -mcvt -mbranch-cost=@var{cost} -mfuse-add=@var{level} -mfuse-move=@var{level} --mcall-prologues -mgas-isr-prologues -mint8 -mflmap +-mfuse-move2 -mcall-prologues -mgas-isr-prologues -mint8 -mflmap -mdouble=@var{bits} -mlong-double=@var{bits} -mno-call-main -mn_flash=@var{size} -mfract-convert-truncate -mno-interrupts -mmain-is-OS_task -mrelax -mrmw -mstrict-X -mtiny-stack @@ -1097,7 +1103,8 @@ Objective-C and Objective-C++ Dialects}. -mcmodel=@var{code-model} -mrelax -mpass-mrelax-to-as -mrecip -mrecip=@var{opt} -mfrecipe -mno-frecipe -mdiv32 -mno-div32 -mlam-bh -mno-lam-bh -mlamcas -mno-lamcas -mld-seq-sa -mno-ld-seq-sa --mtls-dialect=@var{opt} -mannotate-tablejump -mno-annotate-tablejump} +-mscq -mno-scq -mtls-dialect=@var{opt} +-mannotate-tablejump -mno-annotate-tablejump} @emph{M32C Options} (@ref{M32C Options}) @gccoptlist{-mcpu=@var{cpu} -msim -memregs=@var{number}} @@ -1258,7 +1265,7 @@ See RS/6000 and PowerPC Options. @emph{PRU Options} (@ref{PRU Options}) @gccoptlist{-mmcu=@var{mcu} -minrt -mno-relax -mloop --mabi=@var{variant}} +-mmul -mfillzero -mabi=@var{variant}} @emph{RISC-V Options} (@ref{RISC-V Options}) @gccoptlist{-mbranch-cost=@var{N-instruction} @@ -1268,7 +1275,7 @@ See RS/6000 and PowerPC Options. -mfence-tso -mno-fence-tso -mdiv -mno-div -misa-spec=@var{ISA-spec-string} --march=@var{ISA-string|Profiles|Profiles_ISA-string} +-march=@var{ISA-string|Profiles|Profiles_ISA-string|CPU/processor string} -mtune=@var{processor-string} -mpreferred-stack-boundary=@var{num} -msmall-data-limit=@var{N-bytes} @@ -1496,8 +1503,8 @@ See RS/6000 and PowerPC Options. -mamx-tile -mamx-int8 -mamx-bf16 -muintr -mhreset -mavxvnni -mamx-fp8 -mavx512fp16 -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mapxf --musermsr -mavx10.1 -mavx10.1-256 -mavx10.1-512 -mevex512 -mavx10.2 --mamx-avx512 -mamx-tf32 -mamx-transpose -mmovrs -mamx-movrs +-musermsr -mavx10.1 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mmovrs +-mamx-movrs -mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops -minline-stringops-dynamically -mstringop-strategy=@var{alg} -mkl -mwidekl @@ -2440,8 +2447,8 @@ ISO C99. This standard is substantially completely supported, modulo bugs and floating-point issues (mainly but not entirely relating to optional C99 features from Annexes F and G). See -@w{@uref{https://gcc.gnu.org/c99status.html}} for more information. The -names @samp{c9x} and @samp{iso9899:199x} are deprecated. +@w{@uref{https://gcc.gnu.org/projects/c-status.html}} for more information. +The names @samp{c9x} and @samp{iso9899:199x} are deprecated. @item c11 @itemx c1x @@ -3015,8 +3022,9 @@ Version 20, which first appeared in G++ 15, fixes manglings of lambdas in static data member initializers. Version 21, which first appeared in G++ 16, fixes unnecessary captures -in noexcept lambdas (c++/119764) and layout of a base class -with all explicitly defaulted constructors (c++/120012). +in noexcept lambdas (c++/119764), layout of a base class with all explicitly +defaulted constructors (c++/120012), and mangling of class and array +objects with implicitly zero-initialized non-trailing subobjects (c++/121231). See also @option{-Wabi}. @@ -3297,6 +3305,50 @@ Enable support for the C++ coroutines extension (experimental). Permit the C++ front end to note all candidates during overload resolution failure, including when a deleted function is selected. +@item -fdump-lang- +@itemx -fdump-lang-@var{switch} +@itemx -fdump-lang-@var{switch}-@var{options} +@itemx -fdump-lang-@var{switch}-@var{options}=@var{filename} +Control the dumping of C++-specific information. The @var{options} +and @var{filename} portions behave as described in the +@option{-fdump-tree} option. The following @var{switch} values are +accepted: + +@table @samp +@item all +Enable all of the below. + +@opindex fdump-lang-class +@item class +Dump class hierarchy information. Virtual table information is emitted +unless '@option{slim}' is specified. + +@opindex fdump-lang-module +@item module +Dump module information. Options @option{lineno} (locations), +@option{graph} (reachability), @option{blocks} (clusters), +@option{uid} (serialization), @option{alias} (mergeable), +@option{asmname} (Elrond), @option{eh} (mapper) & @option{vops} +(macros) may provide additional information. + +@opindex fdump-lang-raw +@item raw +Dump the raw internal tree data. + +@opindex fdump-lang-tinst +@item tinst +Dump the sequence of template instantiations, indented to show the +depth of recursion. The @option{lineno} option adds the source +location where the instantiation was triggered, and the +@option{details} option also dumps pre-instantiation substitutions +such as those performed during template argument deduction. + +Lines in the .tinst dump start with @samp{I} for an instantiation, +@samp{S} for another substitution, and @samp{R[IS]} for the reopened +context of a deferred instantiation. + +@end table + @opindex fno-elide-constructors @opindex felide-constructors @item -fno-elide-constructors @@ -3348,7 +3400,8 @@ aliases, the default is @option{-fno-extern-tls-init}. @item -ffold-simple-inlines @itemx -fno-fold-simple-inlines Permit the C++ frontend to fold calls to @code{std::move}, @code{std::forward}, -@code{std::addressof} and @code{std::as_const}. In contrast to inlining, this +@code{std::addressof}, @code{std::to_underlying} +and @code{std::as_const}. In contrast to inlining, this means no debug information will be generated for such calls. Since these functions are rarely interesting to debug, this flag is enabled by default unless @option{-fno-inline} is active. @@ -3771,6 +3824,23 @@ Warn when a type with an ABI tag is used in a context that does not have that ABI tag. See @ref{C++ Attributes} for more information about ABI tags. +@opindex Wabbreviated-auto-in-template-arg +@opindex Wno-abbreviated-auto-in-template-arg +@item -Wno-abbreviated-auto-in-template-arg +Disable the error for an @code{auto} placeholder type used within a +template argument list to declare a C++20 abbreviated function +template, e.g. + +@smallexample +void f(S<auto>); +@end smallexample + +This feature was proposed in the Concepts TS, but was not adopted into +C++20; in the standard, a placeholder in a parameter declaration must +appear as a decl-specifier. The error can also be reduced to a +warning by @option{-fpermissive} or +@option{-Wno-error=abbreviated-auto-in-template-arg}. + @opindex Wcomma-subscript @opindex Wno-comma-subscript @item -Wcomma-subscript @r{(C++ and Objective-C++ only)} @@ -4403,6 +4473,20 @@ to filter out those warnings. Disable the warning about the case when an exception handler is shadowed by another handler, which can point out a wrong ordering of exception handlers. +@opindex Wsfinae-incomplete +@opindex Wno-sfinae-incomplete +Warn about a class that is found to be incomplete, or a function with +auto return type that has not yet been deduced, in a context where +that causes substitution failure rather than an error, and then the +class or function is defined later in the translation unit. This is +problematic because template instantiations or concept checks could +have different results if they first occur either before or after the +definition. + +This warning is enabled by default. @option{-Wsfinae-incomplete=2} +adds a warning at the point of substitution failure, to make it easier +to track down problems flagged by the default mode. + @opindex Wstrict-null-sentinel @opindex Wno-strict-null-sentinel @item -Wstrict-null-sentinel @r{(C++ and Objective-C++ only)} @@ -4412,6 +4496,28 @@ to @code{__null}. Although it is a null pointer constant rather than a null pointer, it is guaranteed to be of the same size as a pointer. But this use is not portable across different compilers. +@opindex Wno-non-c-typedef-for-linkage +@opindex Wnon-c-typedef-for-linkage +@item -Wno-non-c-typedef-for-linkage @r{(C++ and Objective-C++ only)} +Disable pedwarn for unnamed classes with a typedef name for linkage purposes +containing C++ specific members, base classes, default member initializers +or lambda expressions, including those on nested member classes. + +@smallexample +typedef struct @{ + int a; // non-static data members are ok + struct T @{ int b; @}; // member classes too + enum E @{ E1, E2, E3 @}; // member enumerations as well + int c = 42; // default member initializers are not ok + struct U : A @{ int c; @}; // classes with base classes are not ok + typedef int V; // typedef is not ok + using W = int; // using declaration is not ok + decltype([]()@{@}) x; // lambda expressions not ok +@} S; +@end smallexample + +In all these cases, the tag name S should be added after the struct keyword. + @opindex Wno-non-template-friend @opindex Wnon-template-friend @item -Wno-non-template-friend @r{(C++ and Objective-C++ only)} @@ -5350,7 +5456,8 @@ options: -fdiagnostics-urls=never -fdiagnostics-path-format=separate-events -fdiagnostics-text-art-charset=none --fno-diagnostics-show-event-links} +-fno-diagnostics-show-event-links +-fno-diagnostics-show-nesting} In the future, if GCC changes the default appearance of its diagnostics, the corresponding option to disable the new behavior will be added to this list. @@ -5687,6 +5794,22 @@ left margin. This option controls the minimum width of the left margin printed by @option{-fdiagnostics-show-line-numbers}. It defaults to 6. +@opindex fdiagnostics-show-context +@item -fdiagnostics-show-context[=@var{depth}] +@itemx -fno-diagnostics-show-context +With this option, the compiler might print the interesting control flow +chain that guards the basic block of the statement which has the warning. +@var{depth} is the maximum depth of the control flow chain. +Currently, The list of the impacted warning options includes: +@option{-Warray-bounds}, @option{-Wstringop-overflow}, +@option{-Wstringop-overread}, @option{-Wstringop-truncation}. +and @option{-Wrestrict}. +More warning options might be added to this list in future releases. +The forms @option{-fdiagnostics-show-context} and +@option{-fno-diagnostics-show-context} are aliases for +@option{-fdiagnostics-show-context=1} and +@option{-fdiagnostics-show-context=0}, respectively. + @opindex fdiagnostics-parseable-fixits @item -fdiagnostics-parseable-fixits Emit fix-it hints in a machine-parseable format, suitable for consumption @@ -5899,8 +6022,7 @@ column numbers, such as @command{dejagnu}. @opindex fdiagnostics-column-unit @item -fdiagnostics-column-unit=@var{UNIT} Select the units for the column number. This affects traditional diagnostics -(in the absence of @option{-fno-show-column}), as well as JSON format -diagnostics if requested. +(in the absence of @option{-fno-show-column}). The default @var{UNIT}, @samp{display}, considers the number of display columns occupied by each character. This may be larger than the number @@ -5973,11 +6095,44 @@ emoji variant of the character). The default is @samp{emoji}, except when the environment variable @env{LANG} is set to @samp{C}, in which case the default is @samp{ascii}. +@opindex fno-diagnostics-show-nesting +@opindex fdiagnostics-show-nesting +@item -fno-diagnostics-show-nesting +Some GCC diagnostics have an internal tree-like structure of nested +sub-diagnostics, such as for problems when instantiating C++ templates. + +By default GCC uses indentation and bullet points in its text output to +show the nesting structure of these diagnostics, moves location +information to separate lines to make the structure clearer, and +eliminates redundant repeated information. + +Selecting @option{-fno-diagnostics-show-nesting} suppresses this +indentation, reformatting, and elision, restoring an older `look'' for the +diagnostics. + +@opindex fno-diagnostics-show-nesting-locations +@opindex fdiagnostics-show-nesting-locations +@item -fno-diagnostics-show-nesting-locations + +When @option{fdiagnostics-show-nesting} is enabled, file names and +line- and column- numbers are displayed on separate lines from the +messages. This location information can be disabled altogether with +@option{-fno-diagnostics-show-nesting-locations}. +This option exists for use by GCC developers, for writing DejaGnu test cases. + +@opindex fdiagnostics-show-nesting-levels +@opindex fno-diagnostics-show-nesting-levels +@item -fdiagnostics-show-nesting-levels +When @option{fdiagnostics-show-nesting} is enabled, use +@option{fdiagnostics-show-nesting-levels} to also display numbers +showing the depth of the nesting. +This option exists for use by GCC developers for debugging nested +diagnostics, but may be of use to plugin authors. + @opindex fdiagnostics-format @item -fdiagnostics-format=@var{FORMAT} Select a different format for printing diagnostics. -@var{FORMAT} is @samp{text}, @samp{sarif-stderr}, @samp{sarif-file}, -@samp{json}, @samp{json-stderr}, or @samp{json-file}. +@var{FORMAT} is @samp{text}, @samp{sarif-stderr} or @samp{sarif-file}. Using this option replaces any additional ``output sinks'' added by @option{-fdiagnostics-add-output=}, or that set by @@ -5989,14 +6144,6 @@ The @samp{sarif-stderr} and @samp{sarif-file} formats both emit diagnostics in SARIF Version 2.1.0 format, either to stderr, or to a file named @file{@var{source}.sarif}, respectively. -The various @samp{json}, @samp{json-stderr}, and @samp{json-file} values -are deprecated and refer to a legacy JSON-based output format. -The @samp{json} format is a synonym for @samp{json-stderr}. -The @samp{json-stderr} and @samp{json-file} formats are identical, apart from -where the JSON is emitted to. With @samp{json-stderr}, the JSON is emitted -to stderr, whereas with @samp{json-file} it is written to -@file{@var{source}.gcc.json}. - @opindex fdiagnostics-add-output @item -fdiagnostics-add-output=@var{DIAGNOSTICS-OUTPUT-SPEC} Add an additional ``output sink'' for emitting diagnostics. @@ -6030,18 +6177,18 @@ Supported keys are: Override colorization settings from @option{-fdiagnostics-color} for this text output. -@item experimental-nesting=@r{[}yes@r{|}no@r{]} -Enable an experimental mode that emphasizes hierarchical relationships -within diagnostics messages, displaying location information on separate -lines. +@item show-nesting=@r{[}yes@r{|}no@r{]} +Enable a mode that emphasizes hierarchical relationships +within diagnostics messages, as per @option{-fdiagnostics-show-nesting}. +Defaults to @code{yes}. -@item experimental-nesting-show-locations=@r{[}yes@r{|}no@r{]} -If @code{experimental-nesting=yes}, then by default locations are +@item show-nesting-locations=@r{[}yes@r{|}no@r{]} +If @code{show-nesting=yes}, then by default locations are shown; set this key to @code{no} to disable printing such locations. This exists for use by GCC developers, for writing DejaGnu test cases. -@item experimental-nesting-show-levels=@r{[}yes@r{|}no@r{]} -This is a debugging option for use with @code{experimental-nesting=yes}. +@item show-nesting-levels=@r{[}yes@r{|}no@r{]} +This is a debugging option for use with @code{show-nesting=yes}. Set this key to @code{yes} to print explicit nesting levels in the output. This exists for use by GCC developers. @@ -6072,20 +6219,68 @@ in this release. @end table +There is also this key intended for use by GCC developers, rather than +end-users, and subject to change or removal without notice: + +@table @gcctabopt + +@item state-graphs=@r{[}yes@r{|}no@r{]} +This is a debugging feature and defaults to @code{no}. +If @code{state-graphs=yes}, then attempt to capture detailed state +information from @option{-fanalyzer} in the generated SARIF. + +@end table + @item experimental-html Emit diagnostics to a file in HTML format. This scheme is experimental, -and may go away in future GCC releases. The details of the output are -also subject to change. +and may go away in future GCC releases. The keys and details of the output +are also subject to change. Supported keys are: @table @gcctabopt +@item css=@r{[}yes@r{|}no@r{]} +Add an embedded <style> to the generated HTML. Defaults to yes. + @item file=@var{FILENAME} Specify the filename to write the HTML output to, potentially with a leading absolute or relative path. If not specified, it defaults to @file{@var{source}.html}. +@item javascript=@r{[}yes@r{|}no@r{]} +Add an embedded <script> to the generated HTML providing a barebones UI +for viewing results. Defaults to yes. + +@end table + +There are also these keys intended for use by GCC developers, rather than +end-users, and subject to change or removal without notice: + +@table @gcctabopt + +@item show-state-diagrams=@r{[}yes@r{|}no@r{]} +This is a debugging feature and defaults to @code{no}. +If @code{show-state-diagrams=yes}, then attempt to use @command{dot} to +generate SVG diagrams in the generated HTML, visualizing the state at each +event in a diagnostic path. +These are visible by pressing ``j'' and ``k'' to single-step forward and +backward through events. Enabling this option will slow down +HTML generation. + +@item show-state-diagrams-dot-src=@r{[}yes@r{|}no@r{]} +This is a debugging feature and defaults to @code{no}. +If @code{show-state-diagrams-dot-src=yes} +then if @code{show-state-diagrams=yes}, +the generated state diagrams will also show the .dot source input to +GraphViz used for the diagram. + +@item show-state-diagrams-sarif=@r{[}yes@r{|}no@r{]} +This is a debugging feature and defaults to @code{no}. +If @code{show-state-diagrams-sarif=yes} +then if @code{show-state-diagrams=yes}, the generated state diagrams will +also show a SARIF representation of the state. + @end table @end table @@ -6131,11 +6326,8 @@ replaces all existing output sinks, such as from @option{-fdiagnostics-format=}, @opindex fdiagnostics-json-formatting @item -fno-diagnostics-json-formatting By default, when JSON is emitted for diagnostics (via -@option{-fdiagnostics-format=sarif-stderr}, -@option{-fdiagnostics-format=sarif-file}, -@option{-fdiagnostics-format=json}, -@option{-fdiagnostics-format=json-stderr}, -@option{-fdiagnostics-format=json-file}), +@option{-fdiagnostics-format=sarif-stderr} or +@option{-fdiagnostics-format=sarif-file}), GCC will add newlines and indentation to visually emphasize the hierarchical structure of the JSON. @@ -6349,6 +6541,7 @@ only by this flag, but it also downgrades some C and C++ diagnostics that have their own flag: @gccoptlist{ +-Wabbreviated-auto-in-template-arg @r{(C++ and Objective-C++ only)} -Wdeclaration-missing-parameter-type @r{(C and Objective-C only)} -Wimplicit-function-declaration @r{(C and Objective-C only)} -Wimplicit-int @r{(C and Objective-C only)} @@ -7008,14 +7201,14 @@ which is enabled by optimizations in most targets. The precision of the warnings depends on the optimization options used. @opindex Wno-musttail-local-addr -@opindex -Wmusttail-local-addr +@opindex Wmusttail-local-addr @item -Wno-musttail-local-addr Do not warn about passing a pointer (or in C++, a reference) to a local variable or label to argument of a @code{musttail} call. Those variables go out of scope before the tail call instruction. @opindex Wmaybe-musttail-local-addr -@opindex -Wno-maybe-musttail-local-addr +@opindex Wno-maybe-musttail-local-addr @item -Wmaybe-musttail-local-addr Warn when address of a local variable can escape to a @code{musttail} call, unless it goes out of scope already before the @code{musttail} @@ -7809,27 +8002,89 @@ statement. @opindex Wunused-but-set-parameter @opindex Wno-unused-but-set-parameter @item -Wunused-but-set-parameter +@option{-Wunused-but-set-parameter} is the same as +@option{-Wunused-but-set-parameter=3} and +@option{-Wno-unused-but-set-parameter} is the same as +@option{-Wunused-but-set-parameter=0}. + +@opindex Wunused-but-set-parameter= +@item -Wunused-but-set-parameter=@var{n} Warn whenever a function parameter is assigned to, but otherwise unused (aside from its declaration). To suppress this warning use the @code{unused} attribute (@pxref{Variable Attributes}). -This warning is also enabled by @option{-Wunused} together with -@option{-Wextra}. +@option{-Wunused-but-set-parameter=0} disables the warning. +With @option{-Wunused-but-set-parameter=1} all uses except initialization +and left hand side of assignment which is not further used disable the +warning. +With @option{-Wunused-but-set-parameter=2} additionally uses of parameter +in @code{++} and @code{--} operators don't count as uses. +And finally with @option{-Wunused-but-set-parameter=3} additionally +uses in @var{parm} @code{@var{@@}=} @var{rhs} outside of @var{rhs} don't +count as uses. See @option{-Wunused-but-set-variable=@var{n}} option for +examples. + +This @option{-Wunused-but-set-parameter=3} warning is also enabled by +@option{-Wunused} together with @option{-Wextra}. @opindex Wunused-but-set-variable @opindex Wno-unused-but-set-variable @item -Wunused-but-set-variable +@option{-Wunused-but-set-variable} is the same as +@option{-Wunused-but-set-variable=3} and +@option{-Wno-unused-but-set-variable} is the same as +@option{-Wunused-but-set-variable=0}. + +@opindex Wunused-but-set-variable= +@item -Wunused-but-set-variable=@var{n} Warn whenever a local variable is assigned to, but otherwise unused (aside from its declaration). -This warning is enabled by @option{-Wall}. +This @option{-Wunused-but-set-variable=3} warning is enabled by @option{-Wall}. To suppress this warning use the @code{unused} attribute (@pxref{Variable Attributes}). -This warning is also enabled by @option{-Wunused}, which is enabled -by @option{-Wall}. +@option{-Wunused-but-set-variable=0} disables the warning. +With @option{-Wunused-but-set-variable=1} all uses except initialization +and left hand side of assignment which is not further used disable the +warning. +With @option{-Wunused-but-set-variable=2} additionally uses of variable +in @code{++} and @code{--} operators don't count as uses. +And finally with @option{-Wunused-but-set-variable=3} additionally +uses in @var{parm} @code{@var{@@}=} @var{rhs} outside of @var{rhs} don't +count as uses. + +This @option{-Wunused-but-set-variable=3} warning is also enabled by +@option{-Wunused}, which is enabled by @option{-Wall}. + +@smallexample +void foo (void) +@{ + int a = 1; // @option{-Wunused-variable} warning + int b = 0; // Warning for @var{n} >= 1 + b = 1; b = 2; + int c = 0; // Warning for @var{n} >= 2 + ++c; c--; --c; c++; + int d = 0; // Warning for @var{n} >= 3 + d += 4; + int e = 0; // No warning, cast to void + (void) e; + int f = 0; // No warning, f used + int g = f = 5; + (void) g; + int h = 0; // No warning, preincrement used + int i = ++h; + (void) i; + int j = 0; // No warning, postdecrement used + int k = j--; + (void) k; + int l = 0; // No warning, l used + int m = l |= 2; + (void) m; +@} +@end smallexample @opindex Wunused-function @opindex Wno-unused-function @@ -8621,6 +8876,11 @@ larger. @item -Walloca This option warns on all uses of @code{alloca} in the source. +@opindex Wno-auto-profile +@opindex Wauto-profile +@item -Wauto-profile +Output warnings about auto-profile inconsistencies. + @opindex Walloca-larger-than= @opindex Wno-alloca-larger-than @item -Walloca-larger-than=@var{byte-size} @@ -9573,6 +9833,12 @@ and ISO C++ 2017. This warning is enabled by @option{-Wall}. Warn about C++ constructs whose meaning differs between ISO C++ 2017 and ISO C++ 2020. This warning is enabled by @option{-Wall}. +@opindex Wc++26-compat +@opindex Wno-c++26-compat +@item -Wc++26-compat @r{(C++ and Objective-C++ only)} +Warn about C++ constructs whose meaning differs between ISO C++ 2023 +and upcoming ISO C++ 2026. This warning is enabled by @option{-Wall}. + @opindex Wc++11-extensions @opindex Wno-c++11-extensions @item -Wno-c++11-extensions @r{(C++ and Objective-C++ only)} @@ -10212,6 +10478,14 @@ Do not warn if certain built-in macros are redefined. This suppresses warnings for redefinition of @code{__TIMESTAMP__}, @code{__TIME__}, @code{__DATE__}, @code{__FILE__}, and @code{__BASE_FILE__}. +@opindex Wkeyword-macro +@opindex Wno-keyword-macro +@item -Wkeyword-macro +Warn if a keyword is defined as a macro or undefined. +For C++ identifiers with special meaning or standard attribute identifiers +are diagnosed as well. This warning is enabled by default for C++26 +if @code{-Wpedantic} and emits a pedwarn in that case. + @opindex Wfree-labels @opindex Wno-free-labels @item -Wfree-labels @r{(C and Objective-C only)} @@ -15377,7 +15651,7 @@ If omitted, it defaults to @file{fbdata.afdo} in the current directory. Producing an AutoFDO profile data file requires running your program with the @command{perf} utility on a supported GNU/Linux target system. -For more information, see @uref{https://perf.wiki.kernel.org/}. +For more information, see @uref{https://perfwiki.github.io/main/}. E.g. @smallexample @@ -15395,6 +15669,12 @@ E.g. create_gcov --binary=your_program.unstripped --profile=perf.data \ --gcov=profile.afdo @end smallexample + +@opindex fauto-profile-inlining +@item -fauto-profile-inlining +When auto-profile is available inline all relevant functions which was +inlined in the tran run before reading the profile feedback. This improves +context sensitivity of the profile. Enabled by default. @end table The following options control compiler behavior regarding floating-point @@ -17273,6 +17553,10 @@ this parameter. The default value of this parameter is 50. @item vect-induction-float Enable loop vectorization of floating point inductions. +@item vect-scalar-cost-multiplier +Apply the given multiplier % to scalar loop costing during vectorization. +Increasing the cost multiplier will make vector loops more profitable. + @item vrp-block-limit Maximum number of basic blocks before VRP switches to a lower memory algorithm. @@ -17350,6 +17634,9 @@ predicate chain. @item uninit-max-num-chains Maximum number of predicates ored in the normalized predicate chain. +@item uninit-max-prune-work +Maximum amount of work done to prune paths where the variable is always initialized. + @item sched-autopref-queue-depth Hardware autoprefetcher scheduler model control flag. Number of lookahead cycles the model looks into; at ' @@ -17513,20 +17800,9 @@ The precision of division is proportional to this param when division approximation is enabled. The default value is 2. @item aarch64-autovec-preference -Force an ISA selection strategy for auto-vectorization. -@table @samp -@item default -Use the default heuristics. -@item asimd-only -Use only Advanced SIMD for auto-vectorization. -@item sve-only -Use only SVE for auto-vectorization. -@item prefer-asimd -Use both Advanced SIMD and SVE. Prefer Advanced SIMD when the costs are -deemed equal. -@item prefer-sve -Use both Advanced SIMD and SVE. Prefer SVE when the costs are deemed equal. -@end table +An old alias for @option{-mautovec-preference}. If both +@option{-mautovec-preference} and @option{--param=aarch64-autovec-preference} +are passed, the @option{--param} value will be used. @item aarch64-ldp-policy Fine-grained policy for load pairs. @@ -17596,6 +17872,9 @@ Instructions number above which STFL stall penalty can be compensated. The maximum number of use and def visits when discovering a STV chain before the discovery is aborted. +@item ix86-vect-unroll-limit +Limit how much the autovectorizer may unroll a loop. + @end table @end table @@ -20424,18 +20703,22 @@ LTO output files. @opindex fdump-rtl-@var{pass} @item -d@var{letters} @itemx -fdump-rtl-@var{pass} -@itemx -fdump-rtl-@var{pass}=@var{filename} +@itemx -fdump-rtl-@var{pass}-@var{options} +@itemx -fdump-rtl-@var{pass}-@var{options}=@var{filename} Says to make debugging dumps during compilation at times specified by -@var{letters}. This is used for debugging the RTL-based passes of the +@var{letters} when using @option{-d} or by @var{pass} when using +@option{-fdump-rtl}. This is used for debugging the RTL-based passes of the compiler. Some @option{-d@var{letters}} switches have different meaning when @option{-E} is used for preprocessing. @xref{Preprocessor Options}, for information about preprocessor-specific dump options. -Debug dumps can be enabled with a @option{-fdump-rtl} switch or some -@option{-d} option @var{letters}. Here are the possible -letters for use in @var{pass} and @var{letters}, and their meanings: +The @samp{-@var{options}} form allows greater control over the details of the +dump. See @option{-fdump-tree}. + +Here are actual instances of command-line options following these patterns and +their meanings: @table @gcctabopt @@ -20890,30 +21173,10 @@ Dump language-specific information. The file name is made by appending @itemx -fdump-lang-@var{switch}-@var{options}=@var{filename} Control the dumping of language-specific information. The @var{options} and @var{filename} portions behave as described in the -@option{-fdump-tree} option. The following @var{switch} values are -accepted: - -@table @samp -@item all - -Enable all language-specific dumps. - -@item class -Dump class hierarchy information. Virtual table information is emitted -unless '@option{slim}' is specified. This option is applicable to C++ only. - -@item module -Dump module information. Options @option{lineno} (locations), -@option{graph} (reachability), @option{blocks} (clusters), -@option{uid} (serialization), @option{alias} (mergeable), -@option{asmname} (Elrond), @option{eh} (mapper) & @option{vops} -(macros) may provide additional information. This option is -applicable to C++ only. - -@item raw -Dump the raw internal tree data. This option is applicable to C++ only. - -@end table +@option{-fdump-tree} option. @option{-fdump-tree-all} enables all +language-specific dumps; other options vary with the language. For +instance, see @xref{C++ Dialect Options} for the @option{-fdump-lang} +flags supported by the C++ front-end. @opindex fdump-passes @item -fdump-passes @@ -20982,8 +21245,7 @@ GraphViz to @file{@var{file}.@var{passid}.@var{pass}.dot}. Each function in the file is pretty-printed as a subgraph, so that GraphViz can render them all in a single plot. -This option currently only works for RTL dumps, and the RTL is always -dumped in slim form. +RTL is always dumped in slim form. @item vops Enable showing virtual operands for every statement. @item lineno @@ -21980,6 +22242,36 @@ used directly. The same applies when using @option{-mcpu=} when the selected cpu supports the @samp{lse} feature. This option is on by default. +@item -mmax-vectorization +@itemx -mno-max-vectorization +Enable or disable an override to vectorizer cost model making vectorization +always appear profitable. This option can be combined with +@option{-mautovec-preference} allowing precise control over which ISA will be +used for auto-vectorization. Unlike @option{-fno-vect-cost-model} or +@option{-fvect-cost-model=unlimited} this option does not turn off cost +comparison between different vector modes. + +@item -mautovec-preference=@var{name} +Force an ISA selection strategy for auto-vectorization. The possible +values of @var{name} are: +@table @samp +@item default +Use the default heuristics. +@item asimd-only +Use only Advanced SIMD for auto-vectorization. +@item sve-only +Use only SVE for auto-vectorization. +@item prefer-asimd +Use both Advanced SIMD and SVE. Prefer Advanced SIMD when the costs are +deemed equal. +@item prefer-sve +Use both Advanced SIMD and SVE. Prefer SVE when the costs are deemed equal. +@end table + +For best performance it is highly recommended to use @option{-mcpu} or +@option{-mtune} instead. This parameter should only be used for code +exploration. + @opindex march @item -march=@var{name} Specify the name of the target architecture and, optionally, one or @@ -22066,7 +22358,7 @@ performance of the code. Permissible values for this option are: The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55}, -@samp{apple-m1}, @samp{apple-m2}, @samp{apple-m3} specify that GCC +@samp{apple-m1}, @samp{apple-m2}, @samp{apple-m3}, @samp{gb10} specify that GCC should tune for a big.LITTLE system. The value @samp{neoverse-512tvb} specifies that GCC should tune @@ -22355,6 +22647,9 @@ Enable the FlagM2 flag conversion instructions. Enable the Pointer Authentication Extension. @item cssc Enable the Common Short Sequence Compression instructions. +@item cmpbr +Enable the shorter compare and branch instructions, @code{cbb}, @code{cbh} and +@code{cb}. @item sme Enable the Scalable Matrix Extension. This is only supported when SVE2 is also enabled. @@ -22637,9 +22932,19 @@ Compile for CDNA2 Instinct MI200 series devices (gfx90a). @item gfx90c Compile for GCN5 Vega 7 devices (gfx90c). +@item gfx942 +Compile for CDNA3 Instinct MI300 series devices (gfx942). (Experimental) + +@item gfx950 +Compile for the CDNA3 gfx950 devices. (Experimental) + @item gfx9-generic Compile generic code for Vega devices, executable on the following subset of -GFX9 devices: gfx900, gfx902, gfx904, gfx906, gfx909 and gfx90c. (Experimental) +GFX9 devices: gfx900, gfx902, gfx904, gfx906, gfx909 and gfx90c. + +@item gfx9-4-generic +Compile generic code for CDNA3 devices, executable on the following subset of +GFX9 devices: gfx942 and gfx950. (Experimental) @item gfx1030 Compile for RDNA2 gfx1030 devices (GFX10 series). @@ -22664,7 +22969,7 @@ Compile for RDNA2 gfx1036 devices (GFX10 series). @item gfx10-3-generic Compile generic code for GFX10-3 devices, executable on gfx1030, -gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, and gfx1036. (Experimental) +gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, and gfx1036. @item gfx1100 Compile for RDNA3 gfx1100 devices (GFX11 series). @@ -22692,7 +22997,7 @@ Compile for RDNA3 gfx1153 devices (GFX11 series). (Experimental) @item gfx11-generic Compile generic code for GFX11 devices, executable on gfx1100, gfx1101, -gfx1102, gfx1103, gfx1150, gfx1151, gfx1152, and gfx1153. (Experimental) +gfx1102, gfx1103, gfx1150, gfx1151, gfx1152, and gfx1153. @end table @opindex msram-ecc @@ -23520,7 +23825,7 @@ These @samp{-m} options are defined for the ARM port: @opindex mabi @item -mabi=@var{name} Generate code for the specified ABI@. Permissible values are: @samp{apcs-gnu}, -@samp{atpcs}, @samp{aapcs}, @samp{aapcs-linux} and @samp{iwmmxt}. +@samp{atpcs}, @samp{aapcs} and @samp{aapcs-linux}. @opindex mapcs-frame @item -mapcs-frame @@ -24899,6 +25204,10 @@ Valid values for @var{level} are in the range @code{0} @dots{} @code{23} which is a 3:2:2:2 mixed radix value. Each digit controls some aspect of the optimization. +@opindex mfuse-move2 +@item -mfuse-move2 +Run a post combine optimization pass that tries to fuse move instructions. + @opindex mstrict-X @item -mstrict-X Use address register @code{X} in a way proposed by the hardware. This means @@ -28285,6 +28594,14 @@ Whether a same-address load-load barrier (@code{dbar 0x700}) is needed. When build with @option{-march=la664}, it is enabled by default. The default is @option{-mno-ld-seq-sa}, the load-load barrier is needed. +@opindex mscq +@opindex mno-scq +@item -mscq +@item -mno-scq +Use (do not use) the 16-byte conditional store instruction @code{sc.q}. +The default is @option{-mscq} if the machine type specified with +@option{-march=} supports this instruction, @option{-mno-scq} otherwise. + @opindex mtls-dialect @item -mtls-dialect=@var{opt} This option controls which tls dialect may be used for general dynamic and @@ -30698,6 +31015,7 @@ Generate code for the specified PTX ISA target architecture. Valid architecture strings are @samp{sm_30}, @samp{sm_35}, @samp{sm_37}, @samp{sm_52}, @samp{sm_53}, +@samp{sm_61}, @samp{sm_70}, @samp{sm_75}, @samp{sm_80}, and @samp{sm_89}. The default depends on how the compiler has been configured, see @@ -30724,6 +31042,7 @@ Generate code for the specified PTX ISA version. Valid version strings are @samp{3.1}, @samp{4.1}, @samp{4.2}, +@samp{5.0}, @samp{6.0}, @samp{6.3}, @samp{7.0}, @samp{7.3}, and @samp{7.8}. The default PTX ISA version is the one that added support for the @@ -30877,12 +31196,13 @@ to store the immediate to a register first. @opindex mcmodel= @opindex mcmodel=small @item -mcmodel=small -Generate OpenRISC code for the small model: The GOT is limited to 64k. This is -the default model. +Generate OpenRISC code for the small model: The GOT is limited to 64k and +function call jumps are limited to 64M offsets. This is the default model. @opindex mcmodel=large @item -mcmodel=large -Generate OpenRISC code for the large model: The GOT may grow up to 4G in size. +Generate OpenRISC code for the large model: The GOT may grow up to 4G in size +and function call jumps can target the full 4G address space. @end table @@ -31005,6 +31325,14 @@ instead of the @option{--relax} option. @item -mloop Allow (or do not allow) GCC to use the LOOP instruction. +@opindex mmul +@item -mmul +Allow (or do not allow) GCC to use the PRU multiplier unit. + +@opindex mfillzero +@item -mfillzero +Allow (or do not allow) GCC to use the FILL and ZERO instructions. + @opindex mabi @item -mabi=@var{variant} Specify the ABI variant to output code for. @option{-mabi=ti} selects the @@ -31115,7 +31443,7 @@ The default is @option{-misa-spec=20191213} unless GCC has been configured with @option{--with-isa-spec=} specifying a different default version. @opindex march -@item -march=@var{ISA-string|Profiles|Profile_ISA-string} +@item -march=@var{ISA-string|Profiles|Profile_ISA-string|help|unset} Generate code for given RISC-V ISA or Profiles or a combination of them (e.g.@: @samp{rv64im} @samp{rvi20u64} @samp{rvi20u64_zbb}). ISA strings and Profiles must be lower-case. Examples include @samp{rv64i}, @samp{rv32g}, @@ -31126,6 +31454,12 @@ at the beginning of the option, then use underline connect ISA-string (e.g.@: @option{help} (@option{-march=help}) is accepted to list all supported extensions. +@samp{-march=unset} causes the compiler to ignore any @samp{-march=@dots{}} options +that appear earlier on the command line, behaving as if the option was never +passed. This is useful for ensuring that the architecture is taken from the +@samp{-mcpu} option, and it will result in an error if no @samp{-mcpu} option +is given when @samp{-march=unset} is used. + The syntax of the ISA string is defined as follows: @table @code @@ -31143,501 +31477,8 @@ syntax @samp{<major>p<minor>} or @samp{<major>}, (e.g.@: @samp{m2p1} or @end table Supported extension are listed below: -@multitable @columnfractions .10 .10 .80 -@headitem Extension Name @tab Supported Version @tab Description -@item i -@tab 2.0, 2.1 -@tab Base integer extension. - -@item e -@tab 2.0 -@tab Reduced base integer extension. - -@item g -@tab - -@tab General-purpose computing base extension, @samp{g} will expand to -@samp{i}, @samp{m}, @samp{a}, @samp{f}, @samp{d}, @samp{zicsr} and -@samp{zifencei}. - -@item m -@tab 2.0 -@tab Integer multiplication and division extension. - -@item a -@tab 2.0, 2.1 -@tab Atomic extension. - -@item f -@tab 2.0, 2.2 -@tab Single-precision floating-point extension. - -@item d -@tab 2.0, 2.2 -@tab Double-precision floating-point extension. - -@item c -@tab 2.0 -@tab Compressed extension. - -@item h -@tab 1.0 -@tab Hypervisor extension. - -@item v -@tab 1.0 -@tab Vector extension. - -@item zicsr -@tab 2.0 -@tab Control and status register access extension. - -@item zifencei -@tab 2.0 -@tab Instruction-fetch fence extension. - -@item zicond -@tab 1.0 -@tab Integer conditional operations extension. - -@item za64rs -@tab 1.0 -@tab Reservation set size of 64 bytes. - -@item za128rs -@tab 1.0 -@tab Reservation set size of 128 bytes. - -@item zawrs -@tab 1.0 -@tab Wait-on-reservation-set extension. - -@item zba -@tab 1.0 -@tab Address calculation extension. - -@item zbb -@tab 1.0 -@tab Basic bit manipulation extension. - -@item zbc -@tab 1.0 -@tab Carry-less multiplication extension. - -@item zbs -@tab 1.0 -@tab Single-bit operation extension. - -@item zfinx -@tab 1.0 -@tab Single-precision floating-point in integer registers extension. - -@item zdinx -@tab 1.0 -@tab Double-precision floating-point in integer registers extension. - -@item zhinx -@tab 1.0 -@tab Half-precision floating-point in integer registers extension. - -@item zhinxmin -@tab 1.0 -@tab Minimal half-precision floating-point in integer registers extension. - -@item zbkb -@tab 1.0 -@tab Cryptography bit-manipulation extension. - -@item zbkc -@tab 1.0 -@tab Cryptography carry-less multiply extension. - -@item zbkx -@tab 1.0 -@tab Cryptography crossbar permutation extension. - -@item zkne -@tab 1.0 -@tab AES Encryption extension. - -@item zknd -@tab 1.0 -@tab AES Decryption extension. - -@item zknh -@tab 1.0 -@tab Hash function extension. - -@item zkr -@tab 1.0 -@tab Entropy source extension. - -@item zksed -@tab 1.0 -@tab SM4 block cipher extension. - -@item zksh -@tab 1.0 -@tab SM3 hash function extension. - -@item zkt -@tab 1.0 -@tab Data independent execution latency extension. - -@item zk -@tab 1.0 -@tab Standard scalar cryptography extension. - -@item zkn -@tab 1.0 -@tab NIST algorithm suite extension. -@item zks -@tab 1.0 -@tab ShangMi algorithm suite extension. - -@item zihintntl -@tab 1.0 -@tab Non-temporal locality hints extension. - -@item zihintpause -@tab 1.0 -@tab Pause hint extension. - -@item zicboz -@tab 1.0 -@tab Cache-block zero extension. - -@item zicbom -@tab 1.0 -@tab Cache-block management extension. - -@item zicbop -@tab 1.0 -@tab Cache-block prefetch extension. - -@item zic64b -@tab 1.0 -@tab Cache block size isf 64 bytes. - -@item ziccamoa -@tab 1.0 -@tab Main memory supports all atomics in A. - -@item ziccif -@tab 1.0 -@tab Main memory supports instruction fetch with atomicity requirement. - -@item zicclsm -@tab 1.0 -@tab Main memory supports misaligned loads/stores. - -@item ziccrse -@tab 1.0 -@tab Main memory supports forward progress on LR/SC sequences. - -@item zicntr -@tab 2.0 -@tab Standard extension for base counters and timers. - -@item zihpm -@tab 2.0 -@tab Standard extension for hardware performance counters. - -@item ztso -@tab 1.0 -@tab Total store ordering extension. - -@item zve32x -@tab 1.0 -@tab Vector extensions for embedded processors. - -@item zve32f -@tab 1.0 -@tab Vector extensions for embedded processors. - -@item zve64x -@tab 1.0 -@tab Vector extensions for embedded processors. - -@item zve64f -@tab 1.0 -@tab Vector extensions for embedded processors. - -@item zve64d -@tab 1.0 -@tab Vector extensions for embedded processors. - -@item zvl32b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl64b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl128b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl256b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl512b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl1024b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl2048b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvl4096b -@tab 1.0 -@tab Minimum vector length standard extensions - -@item zvbb -@tab 1.0 -@tab Vector basic bit-manipulation extension. - -@item zvbc -@tab 1.0 -@tab Vector carryless multiplication extension. - -@item zvkb -@tab 1.0 -@tab Vector cryptography bit-manipulation extension. - -@item zvkg -@tab 1.0 -@tab Vector GCM/GMAC extension. - -@item zvkned -@tab 1.0 -@tab Vector AES block cipher extension. - -@item zvknha -@tab 1.0 -@tab Vector SHA-2 secure hash extension. - -@item zvknhb -@tab 1.0 -@tab Vector SHA-2 secure hash extension. - -@item zvksed -@tab 1.0 -@tab Vector SM4 Block Cipher extension. - -@item zvksh -@tab 1.0 -@tab Vector SM3 Secure Hash extension. - -@item zvkn -@tab 1.0 -@tab Vector NIST Algorithm Suite extension, @samp{zvkn} will expand to -@samp{zvkned}, @samp{zvknhb}, @samp{zvkb} and @samp{zvkt}. - -@item zvknc -@tab 1.0 -@tab Vector NIST Algorithm Suite with carryless multiply extension, @samp{zvknc} -will expand to @samp{zvkn} and @samp{zvbc}. - -@item zvkng -@tab 1.0 -@tab Vector NIST Algorithm Suite with GCM extension, @samp{zvkng} will expand -to @samp{zvkn} and @samp{zvkg}. - -@item zvks -@tab 1.0 -@tab Vector ShangMi algorithm suite extension, @samp{zvks} will expand -to @samp{zvksed}, @samp{zvksh}, @samp{zvkb} and @samp{zvkt}. - -@item zvksc -@tab 1.0 -@tab Vector ShangMi algorithm suite with carryless multiplication extension, -@samp{zvksc} will expand to @samp{zvks} and @samp{zvbc}. - -@item zvksg -@tab 1.0 -@tab Vector ShangMi algorithm suite with GCM extension, @samp{zvksg} will expand -to @samp{zvks} and @samp{zvkg}. - -@item zvkt -@tab 1.0 -@tab Vector data independent execution latency extension. - -@item zfh -@tab 1.0 -@tab Half-precision floating-point extension. - -@item zfhmin -@tab 1.0 -@tab Minimal half-precision floating-point extension. - -@item zvfh -@tab 1.0 -@tab Vector half-precision floating-point extension. - -@item zvfhmin -@tab 1.0 -@tab Vector minimal half-precision floating-point extension. - -@item zvfbfmin -@tab 1.0 -@tab Vector BF16 converts extension. - -@item zfa -@tab 1.0 -@tab Additional floating-point extension. - -@item zmmul -@tab 1.0 -@tab Integer multiplication extension. - -@item zca -@tab 1.0 -@tab Integer compressed instruction extension. - -@item zcf -@tab 1.0 -@tab Compressed single-precision floating point loads and stores extension. - -@item zcd -@tab 1.0 -@tab Compressed double-precision floating point loads and stores extension. - -@item zcb -@tab 1.0 -@tab Simple compressed instruction extension. - -@item zce -@tab 1.0 -@tab Compressed instruction extensions for embedded processors. - -@item zcmp -@tab 1.0 -@tab Compressed push pop extension. - -@item zcmt -@tab 1.0 -@tab Table jump instruction extension. - -@item smaia -@tab 1.0 -@tab Advanced interrupt architecture extension. - -@item smepmp -@tab 1.0 -@tab PMP Enhancements for memory access and execution prevention on Machine mode. - -@item smstateen -@tab 1.0 -@tab State enable extension. - -@item ssaia -@tab 1.0 -@tab Advanced interrupt architecture extension for supervisor-mode. - -@item sscofpmf -@tab 1.0 -@tab Count overflow & filtering extension. - -@item ssstateen -@tab 1.0 -@tab State-enable extension for supervisor-mode. - -@item sstc -@tab 1.0 -@tab Supervisor-mode timer interrupts extension. - -@item svade -@tab 1.0 -@tab Cause exception when hardware updating of A/D bits is disabled - -@item svadu -@tab 1.0 -@tab Hardware Updating of A/D Bits extension. - -@item svinval -@tab 1.0 -@tab Fine-grained address-translation cache invalidation extension. - -@item svnapot -@tab 1.0 -@tab NAPOT translation contiguity extension. - -@item svpbmt -@tab 1.0 -@tab Page-based memory types extension. - -@item xcvmac -@tab 1.0 -@tab Core-V multiply-accumulate extension. - -@item xcvalu -@tab 1.0 -@tab Core-V miscellaneous ALU extension. - -@item xcvelw -@tab 1.0 -@tab Core-V event load word extension. - -@item xtheadba -@tab 1.0 -@tab T-head address calculation extension. - -@item xtheadbb -@tab 1.0 -@tab T-head basic bit-manipulation extension. - -@item xtheadbs -@tab 1.0 -@tab T-head single-bit instructions extension. - -@item xtheadcmo -@tab 1.0 -@tab T-head cache management operations extension. - -@item xtheadcondmov -@tab 1.0 -@tab T-head conditional move extension. - -@item xtheadfmemidx -@tab 1.0 -@tab T-head indexed memory operations for floating-point registers extension. - -@item xtheadfmv -@tab 1.0 -@tab T-head double floating-point high-bit data transmission extension. - -@item xtheadint -@tab 1.0 -@tab T-head acceleration interruption extension. - -@item xtheadmac -@tab 1.0 -@tab T-head multiply-accumulate extension. - -@item xtheadmemidx -@tab 1.0 -@tab T-head indexed memory operation extension. - -@item xtheadmempair -@tab 1.0 -@tab T-head two-GPR memory operation extension. - -@item xtheadsync -@tab 1.0 -@tab T-head multi-core synchronization extension. - -@item xventanacondops -@tab 1.0 -@tab Ventana integer conditional operations extension. - -@end multitable +@include riscv-ext.texi When @option{-march=} is not specified, use the setting from @option{-mcpu}. @@ -31649,31 +31490,14 @@ When the RISC-V specifications define an extension as depending on other extensions, GCC will implicitly add the dependent extensions to the enabled extension set if they weren't added explicitly. -@opindex mcpu -@item -mcpu=@var{processor-string} -Use architecture of and optimize the output for the given processor, specified -by particular CPU name. -Permissible values for this option are: @samp{sifive-e20}, @samp{sifive-e21}, -@samp{sifive-e24}, @samp{sifive-e31}, @samp{sifive-e34}, @samp{sifive-e76}, -@samp{sifive-s21}, @samp{sifive-s51}, @samp{sifive-s54}, @samp{sifive-s76}, -@samp{sifive-u54}, @samp{sifive-u74}, @samp{sifive-x280}, @samp{sifive-xp450}, -@samp{sifive-x670}, @samp{thead-c906}, @samp{tt-ascalon-d8}, @samp{xiangshan-nanhu}, -@samp{xt-c908}, @samp{xt-c908v}, @samp{xt-c910}, @samp{xt-c910v2}, -@samp{xt-c920}, @samp{xt-c920v2}. +@include riscv-mcpu.texi Note that @option{-mcpu} does not override @option{-march} or @option{-mtune}. -@opindex mtune -@item -mtune=@var{processor-string} -Optimize the output for the given processor, specified by microarchitecture or -particular CPU name. Permissible values for this option are: -@samp{generic-ooo}, @samp{rocket}, @samp{sifive-3-series}, -@samp{sifive-5-series}, @samp{sifive-7-series}, @samp{size}, -@samp{sifive-p400-series}, @samp{sifive-p600-series}, and all valid options for -@option{-mcpu=}. +@include riscv-mtune.texi When @option{-mtune=} is not specified, use the setting from @option{-mcpu}, -the default is @samp{rocket} if both are not specified. +the default is @samp{generic} if both are not specified. The @samp{size} choice is not intended for use by end-users. This is used when @option{-Os} is specified. It overrides the instruction cost info @@ -35207,37 +35031,36 @@ VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support. Intel Alder Lake/Raptor Lake/Meteor Lake/Gracemont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, -GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, -BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, -WIDEKL and AVX-VNNI instruction set support. +GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, +FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and +AVX-VNNI instruction set support. @item arrowlake Intel Arrow Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, -MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, -PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, -UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT and CMPCCXADD instruction set -support. +MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, +VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, UINTR, AVXIFMA, +AVXVNNIINT8, AVXNECONVERT and CMPCCXADD instruction set support. @item arrowlake-s @itemx lunarlake Intel Arrow Lake S/Lunar Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, -MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, -LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, -UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, -SM3 and SM4 instruction set support. +MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, +PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, UINTR, +AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and +SM4 instruction set support. @item pantherlake Intel Panther Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, -MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, -PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, -UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, -SM3, SM4 and PREFETCHI instruction set support. +MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, +VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8, +AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI +instruction set support. @item sapphirerapids @itemx emeraldrapids @@ -35340,9 +35163,9 @@ Intel Clearwater Forest CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, -LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, -ENQCMD, UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, -SHA512, SM3, SM4, USER_MSR and PREFETCHI instruction set support. +LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, ENQCMD, +UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, +SM3, SM4, USER_MSR and PREFETCHI instruction set support. @item k6 AMD K6 CPU with MMX instruction set support. @@ -35589,8 +35412,8 @@ Produce code optimized for the most current Intel processors, which are Haswell and Silvermont for this version of GCC. If you know the CPU on which your code will run, then you should use the corresponding @option{-mtune} or @option{-march} option instead of @option{-mtune=intel}. -But, if you want your application performs better on both Haswell and -Silvermont, then you should use this option. +But, if you want your application performs better on both Diamond Rapids +and Clearwater Forest, then you should use this option. As new Intel processors are deployed in the marketplace, the behavior of this option will change. Therefore, if you upgrade to a newer version of @@ -36232,12 +36055,6 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @opindex mavx10.1 @itemx -mavx10.1 @need 200 -@opindex mavx10.1-256 -@itemx -mavx10.1-256 -@need 200 -@opindex mavx10.1-512 -@itemx -mavx10.1-512 -@need 200 @opindex mavx10.2 @itemx -mavx10.2 @need 200 @@ -37026,11 +36843,6 @@ To invoke egpr usage in inline asm, use new compiler option -mapx-inline-asm-use-gpr32 and user should ensure the instruction supports EGPR. -@opindex mevex512 -@item -mevex512 -@itemx -mno-evex512 -Enables/disables 512-bit vector. It will be default on if AVX512F is enabled. - @end table These @samp{-m} switches are supported in addition to the above @@ -38095,6 +37907,16 @@ compilation which is to be used as input to the next stage: for example, the output of the preprocessor, which is the input to the compiler proper. +@vindex GCC_DIAGNOSTICS_LOG +@item GCC_DIAGNOSTICS_LOG +If @env{GCC_DIAGNOSTICS_LOG} is set, then additional information +about the diagnostics subsystem will be emitted. If it is set to an empty +value, then the information will be written to stderr; otherwise, GCC will +attempt to open that file and write the information there. + +The precise content and format of the information is subject to change; +it is intended for use by GCC developers, rather than end-users. + @vindex GCC_COMPARE_DEBUG @item GCC_COMPARE_DEBUG Setting @env{GCC_COMPARE_DEBUG} is nearly equivalent to passing |