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-rw-r--r--gcc/config/i386/x86-tune.def7
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 91cdca7..a86cbad 100644
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -31,7 +31,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- Updating ix86_issue_rate and ix86_adjust_cost in i386.md
- possibly updating ia32_multipass_dfa_lookahead, ix86_sched_reorder
and ix86_sched_init_global if those tricks are needed.
- - Tunning the flags bellow. Those are split into sections and each
+ - tuning flags below; those are split into sections and each
section is very roughly ordered by importance. */
/*****************************************************************************/
@@ -639,6 +639,11 @@ DEF_TUNE (X86_TUNE_AVX512_STORE_BY_PIECES, "avx512_store_by_pieces",
DEF_TUNE (X86_TUNE_AVX512_TWO_EPILOGUES, "avx512_two_epilogues",
m_ZNVER4 | m_ZNVER5)
+/* X86_TUNE_AVX512_MAKED_EPILOGUES: Use two masked vector epilogues
+ when fit. */
+DEF_TUNE (X86_TUNE_AVX512_MASKED_EPILOGUES, "avx512_masked_epilogues",
+ m_ZNVER4 | m_ZNVER5)
+
/*****************************************************************************/
/*****************************************************************************/
/* Historical relics: tuning flags that helps a specific old CPU designs */