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author | Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | 2025-05-11 04:51:11 +0900 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2025-05-11 12:38:59 -0700 |
commit | 6d73d75a7c04caf3457297400372f87765b9a653 (patch) | |
tree | 1b49eb0be9f5224725d78c9dc1cf53fa26451287 /libstdc++-v3/include/bits/functexcept.h | |
parent | d7d24f9cc55d5cf0a70a984d4e63e8a307710d9e (diff) | |
download | gcc-master.zip gcc-master.tar.gz gcc-master.tar.bz2 |
xtensa: Fix up unwanted spills of SFmode hard registers holding function arguments/returnsHEADtrunkmaster
Until now (presumably after transition to LRA), hard registers storing
function arguments or return values were spilling undesirably when
TARGET_HARD_FLOAT is enabled.
/* example */
float test0(float a, float b) {
return a + b;
}
extern float foo(void);
float test1(void) {
return foo() * 3.14f;
}
;; before
test0:
entry sp, 48
wfr f0, a2
wfr f1, a3
add.s f0, f0, f1
s32i.n a2, sp, 0 ;; unwanted spilling-out
s32i.n a3, sp, 4 ;;
rfr a2, f0
retw.n
.literal .LC1, 1078523331
test1:
entry sp, 48
call8 foo
l32r a8, .LC1
wfr f0, a10
wfr f1, a8
mul.s f0, f0, f1
s32i.n a10, sp, 0 ;; unwanted spilling-out
rfr a2, f0
retw.n
Ultimately, that is because the costs of moving between integer and
floating-point hard registers are undefined and the default (large value)
is used. This patch fixes this.
;; after
test0:
entry sp, 32
wfr f1, a2
wfr f0, a3
add.s f0, f1, f0
rfr a2, f0
retw.n
.literal .LC1, 1078523331
test1:
entry sp, 32
call8 foo
l32r a8, .LC1
wfr f1, a10
wfr f0, a8
mul.s f0, f1, f0
rfr a2, f0
retw.n
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_register_move_cost):
Add appropriate move costs between AR_REGS and FP_REGS.
Diffstat (limited to 'libstdc++-v3/include/bits/functexcept.h')
0 files changed, 0 insertions, 0 deletions