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authorJeff Law <jlaw@ventanamicro.com>2025-08-13 17:16:41 -0600
committerJeff Law <jlaw@ventanamicro.com>2025-08-13 17:16:41 -0600
commit07b74430dffd881177526b4d7e39539c4d676e3a (patch)
tree468fa9b62496bdcde2edb63f849b4bea0712d4b1 /libgfortran/generated/shape_i4.c
parentd2dccd1bf79b862b9989c1b62ed8c074980cd457 (diff)
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[RISC-V][PR target/121531] Cover missing insn types in p400 and p600 scheduler modelsHEADtrunkmaster
So the usual problems, DFAs without full coverage. I took the output of Kito's checker and use that to construct a dummy reservation for the p400 and p600 sifive models. Tested on riscv32-elf and riscv64-elf with no regressions. Pushing to the trunk once pre-commit CI gives the green light. PR target/121531 gcc/ * config/riscv/sifive-p400.md (sifive_p400_unknown): New reservation. * config/riscv/sifive-p600.md (sifive_p600_unkonwn): Likewise. gcc/testsuite/ * gcc.target/riscv/pr121531.c: New test.
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