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| author | Robin Dapp <rdapp@ventanamicro.com> | 2025-07-09 15:58:05 +0200 |
|---|---|---|
| committer | Robin Dapp <rdapp@ventanamicro.com> | 2025-07-10 15:56:20 +0200 |
| commit | 5aa21765236730c1772c19454cbb71365b84d583 (patch) | |
| tree | d4e35fa05c62d063aa42926e5bc2fd40c87f0bf9 /libgcc | |
| parent | dcba959fb30dc250eeb6fdd05aa878e5f1fc8c2d (diff) | |
| download | gcc-5aa21765236730c1772c19454cbb71365b84d583.zip gcc-5aa21765236730c1772c19454cbb71365b84d583.tar.gz gcc-5aa21765236730c1772c19454cbb71365b84d583.tar.bz2 | |
expand: ICE if asked to expand RDIV with non-float type.
This patch adds asserts that ensure we only expand an RDIV_EXPR with
actual float mode. It also replaces the RDIV_EXPR in setting a
vectorized loop's length by EXACT_DIV_EXPR. The code in question is
only used with length-control targets (riscv, powerpc, s390).
PR target/121014
gcc/ChangeLog:
* cfgexpand.cc (expand_debug_expr): Assert FLOAT_MODE_P.
* optabs-tree.cc (optab_for_tree_code): Assert FLOAT_TYPE_P.
* tree-vect-loop.cc (vect_get_loop_len): Use EXACT_DIV_EXPR.
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions