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| author | Andrew Pinski <quic_apinski@quicinc.com> | 2025-07-29 17:02:44 -0700 |
|---|---|---|
| committer | Andrew Pinski <quic_apinski@quicinc.com> | 2025-07-29 17:09:04 -0700 |
| commit | ef49f8e9480129433cc803625ae8c6877cf59453 (patch) | |
| tree | a9f16f646862d3036b61282ac37bb9ce870e08d9 /gcc | |
| parent | 688f1947bd5453632a8973d1d5fba68169c9d1a9 (diff) | |
| download | gcc-ef49f8e9480129433cc803625ae8c6877cf59453.zip gcc-ef49f8e9480129433cc803625ae8c6877cf59453.tar.gz gcc-ef49f8e9480129433cc803625ae8c6877cf59453.tar.bz2 | |
simplify-rtx: Fix Distribute subregs over logic ops [PR121302]
r16-2614-g965564eafb721f had a typo where it would assume byte==0
rather than use the byte (offset) that was passed.
This fixes that typo and also fixes the comment since it is not just
about lowerpart subregs but all non-paradoxical subregs.
Pushed as obvious after bootstrap/test on x86_64-linux-gnu.
PR rtl-optimization/121302
gcc/ChangeLog:
* simplify-rtx.cc (simplify_context::simplify_subreg): Use
byte instead of 0 when calling simplify_subreg.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/simplify-rtx.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc index 125048d..442da9f 100644 --- a/gcc/simplify-rtx.cc +++ b/gcc/simplify-rtx.cc @@ -8398,7 +8398,7 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, return simplify_gen_relational (GET_CODE (op), outermode, innermode, XEXP (op, 0), XEXP (op, 1)); - /* Distribute lowpart subregs through logic ops in cases where one term + /* Distribute non-paradoxical subregs through logic ops in cases where one term disappears. (subreg:M1 (and:M2 X C1)) -> (subreg:M1 X) @@ -8416,7 +8416,7 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, && (GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR) && CONSTANT_P (XEXP (op, 1))) { - rtx op1_subreg = simplify_subreg (outermode, XEXP (op, 1), innermode, 0); + rtx op1_subreg = simplify_subreg (outermode, XEXP (op, 1), innermode, byte); if (op1_subreg == CONSTM1_RTX (outermode)) { if (GET_CODE (op) == IOR) @@ -8424,13 +8424,13 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, rtx op0 = XEXP (op, 0); if (GET_CODE (op) == XOR) op0 = simplify_gen_unary (NOT, innermode, op0, innermode); - return simplify_gen_subreg (outermode, op0, innermode, 0); + return simplify_gen_subreg (outermode, op0, innermode, byte); } if (op1_subreg == CONST0_RTX (outermode)) return (GET_CODE (op) == AND ? op1_subreg - : simplify_gen_subreg (outermode, XEXP (op, 0), innermode, 0)); + : simplify_gen_subreg (outermode, XEXP (op, 0), innermode, byte)); } return NULL_RTX; |