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| author | Pan Li <pan2.li@intel.com> | 2025-05-27 10:24:56 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2025-05-28 20:47:59 +0800 |
| commit | ef0c2ed1382d6edc26ba63322e1009f9acf97efd (patch) | |
| tree | c78089de37bd2c92d62af7fefc62b87139415820 /gcc | |
| parent | f4456ea9e955b971573cdfebd1d10797fd30ad3a (diff) | |
| download | gcc-ef0c2ed1382d6edc26ba63322e1009f9acf97efd.zip gcc-ef0c2ed1382d6edc26ba63322e1009f9acf97efd.tar.gz gcc-ef0c2ed1382d6edc26ba63322e1009f9acf97efd.tar.bz2 | |
RISC-V: Reconcile the existing test for avg_floor
Some existing avg_floor test need updated due to change to
leverage vaadd.vv directly.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/avg-1.c: Update asm check
to vaadd.
* gcc.target/riscv/rvv/autovec/vls/avg-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/avg-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc')
5 files changed, 10 insertions, 19 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c index 30e60d5..4920fa6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c @@ -25,9 +25,8 @@ DEF_AVG_FLOOR (uint8_t, uint16_t, 512) DEF_AVG_FLOOR (uint8_t, uint16_t, 1024) DEF_AVG_FLOOR (uint8_t, uint16_t, 2048) -/* { dg-final { scan-assembler-times {vwadd\.vv} 10 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 10 } } */ -/* { dg-final { scan-assembler-times {vnsra\.wi} 10 } } */ +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 20 } } */ +/* { dg-final { scan-assembler-times {vaadd\.vv} 10 } } */ /* { dg-final { scan-assembler-times {vaaddu\.vv} 10 } } */ /* { dg-final { scan-assembler-not {csrr} } } */ /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c index 33df429..c6a120b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c @@ -23,9 +23,8 @@ DEF_AVG_FLOOR (uint16_t, uint32_t, 256) DEF_AVG_FLOOR (uint16_t, uint32_t, 512) DEF_AVG_FLOOR (uint16_t, uint32_t, 1024) -/* { dg-final { scan-assembler-times {vwadd\.vv} 9 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 9 } } */ -/* { dg-final { scan-assembler-times {vnsra\.wi} 9 } } */ +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 18 } } */ +/* { dg-final { scan-assembler-times {vaadd\.vv} 9 } } */ /* { dg-final { scan-assembler-times {vaaddu\.vv} 9 } } */ /* { dg-final { scan-assembler-not {csrr} } } */ /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c index 9058905..2838c1e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c @@ -21,9 +21,8 @@ DEF_AVG_FLOOR (uint32_t, uint64_t, 128) DEF_AVG_FLOOR (uint32_t, uint64_t, 256) DEF_AVG_FLOOR (uint32_t, uint64_t, 512) -/* { dg-final { scan-assembler-times {vwadd\.vv} 8 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 8 } } */ -/* { dg-final { scan-assembler-times {vnsra\.wi} 8 } } */ +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 16 } } */ +/* { dg-final { scan-assembler-times {vaadd\.vv} 8 } } */ /* { dg-final { scan-assembler-times {vaaddu\.vv} 8 } } */ /* { dg-final { scan-assembler-not {csrr} } } */ /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c index 5880ccc..b7246a3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c @@ -3,9 +3,6 @@ #include "vec-avg-template.h" -/* { dg-final { scan-assembler-times {\tvwadd\.vv} 6 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 3 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 3 } } */ -/* { dg-final { scan-assembler-times {\tvadd\.vi} 3 } } */ -/* { dg-final { scan-assembler-times {\tvnsra.wi} 6 } } */ +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 6 } } */ /* { dg-final { scan-assembler-times {vaaddu\.vv} 6 } } */ +/* { dg-final { scan-assembler-times {vaadd\.vv} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c index 916f33d..3ffe0ef 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c @@ -3,9 +3,6 @@ #include "vec-avg-template.h" -/* { dg-final { scan-assembler-times {\tvwadd\.vv} 6 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 3 } } */ -/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 3 } } */ -/* { dg-final { scan-assembler-times {\tvadd\.vi} 3 } } */ -/* { dg-final { scan-assembler-times {\tvnsra\.wi} 6 } } */ +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 6 } } */ /* { dg-final { scan-assembler-times {vaaddu\.vv} 6 } } */ +/* { dg-final { scan-assembler-times {vaadd\.vv} 3 } } */ |