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| author | Jiawei <jiawei@iscas.ac.cn> | 2025-09-02 07:49:47 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2025-09-02 07:49:47 -0600 |
| commit | 0ffe59c0b9b88fadc2efcc1a69a8ace30ec6e7b8 (patch) | |
| tree | 9f97607adb9c3fc6e5ceb9bb4847326033668f93 /gcc | |
| parent | dea668daa2ea8f9d3d8058dac56e60ebe79255c1 (diff) | |
| download | gcc-0ffe59c0b9b88fadc2efcc1a69a8ace30ec6e7b8.zip gcc-0ffe59c0b9b88fadc2efcc1a69a8ace30ec6e7b8.tar.gz gcc-0ffe59c0b9b88fadc2efcc1a69a8ace30ec6e7b8.tar.bz2 | |
RISC-V: Update Zba 'shNadd.uw' testcase.`
This patch update RISC-V Zba extension 'shNadd.uw' instruction generation.
Supplemented the instruction generation detection of 'sh1add.uw' and
'sh3add.uw'.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zba-shadd.c: New test functions.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/zba-shadd.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shadd.c b/gcc/testsuite/gcc.target/riscv/zba-shadd.c index 61305d3..445ffb2 100644 --- a/gcc/testsuite/gcc.target/riscv/zba-shadd.c +++ b/gcc/testsuite/gcc.target/riscv/zba-shadd.c @@ -1,7 +1,15 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=rv64gc_zba -mabi=lp64" } */ -unsigned long foo(unsigned int a, unsigned long b) +unsigned long foo1(unsigned int a, unsigned long b) +{ + a = a << 1; + unsigned long c = (unsigned long) a; + unsigned long d = b + (c<<1); + return d; +} + +unsigned long foo2(unsigned int a, unsigned long b) { a = a << 1; unsigned long c = (unsigned long) a; @@ -9,5 +17,15 @@ unsigned long foo(unsigned int a, unsigned long b) return d; } +unsigned long foo3(unsigned int a, unsigned long b) +{ + a = a << 1; + unsigned long c = (unsigned long) a; + unsigned long d = b + (c<<3); + return d; +} + +/* { dg-final { scan-assembler "sh1add.uw" } } */ /* { dg-final { scan-assembler "sh2add.uw" } } */ +/* { dg-final { scan-assembler "sh3add.uw" } } */ /* { dg-final { scan-assembler-not {\mzext} } } */ |