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| author | Raphael Moreira Zinsly <rzinsly@ventanamicro.com> | 2025-06-23 10:40:50 -0300 |
|---|---|---|
| committer | Raphael Moreira Zinsly <rzinsly@ventanamicro.com> | 2025-07-04 13:24:08 -0300 |
| commit | eda5a15909c315f0a4a7e76ad083f5f16cf1aef9 (patch) | |
| tree | 10b41ffe24801e24f1e04eebed207373f7824699 /gcc/rust/hir/tree/rust-hir-pattern-abstract.h | |
| parent | 0b7c27325c7e96a48ffadd506c00d02b7d77be5d (diff) | |
| download | gcc-eda5a15909c315f0a4a7e76ad083f5f16cf1aef9.zip gcc-eda5a15909c315f0a4a7e76ad083f5f16cf1aef9.tar.gz gcc-eda5a15909c315f0a4a7e76ad083f5f16cf1aef9.tar.bz2 | |
sh: Recognize >> 31 in treg_set_expr_not_const01
A right shift of 31 will become 0 or 1, this can be checked for
treg_set_expr_not_const01 to avoid matching addc_t_r as this
can expand to a 3 insn sequence instead.
This improves tests 023 to 026 from gcc.target/sh/pr54236-2.c, e.g.:
test_023:
shll r5
mov #0,r1
mov r4,r0
rts
addc r1,r0
With this change:
test_023:
shll r5
movt r0
rts
add r4,r0
We noticed this while evaluating a patch to improve how we handle
selecting between two constants based on the output of a LT/GE 0
test.
gcc/ChangeLog:
* config/sh/predicates.md
(treg_set_expr_not_const01): call sh_recog_treg_set_expr_not_01
* config/sh/sh-protos.h
(sh_recog_treg_set_expr_not_01): New function
* config/sh/sh.cc (sh_recog_treg_set_expr_not_01): Likewise
gcc/testsuite/ChangeLog:
* gcc.target/sh/pr54236-2.c: Fix comments and expected output
Diffstat (limited to 'gcc/rust/hir/tree/rust-hir-pattern-abstract.h')
0 files changed, 0 insertions, 0 deletions