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| author | Vineet Gupta <vineetg@rivosinc.com> | 2025-07-04 12:33:09 -0700 |
|---|---|---|
| committer | Vineet Gupta <vineetg@rivosinc.com> | 2025-07-04 16:12:36 -0700 |
| commit | b960201091fcab631a34a8c8d5b30e9f297dfbe5 (patch) | |
| tree | 53b1bbe68309f8a1b341af24a845e1697dc91f8c /gcc/rust/hir/tree/rust-hir-pattern-abstract.h | |
| parent | eeea445e1d0f0aac813d4eccd7b8f55477772dd0 (diff) | |
| download | gcc-b960201091fcab631a34a8c8d5b30e9f297dfbe5.zip gcc-b960201091fcab631a34a8c8d5b30e9f297dfbe5.tar.gz gcc-b960201091fcab631a34a8c8d5b30e9f297dfbe5.tar.bz2 | |
RISC-V: prefetch: const offset needs to have 5 bits zero, not 4
Spotted this by chance as I saw a similar fixup in comment.
From comments, I think this is needed, but I've not hit any issues due
to this.
gcc/ChangeLog:
* config/riscv/predicates.md (prefetch_operand): mack 5 bits.
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
Diffstat (limited to 'gcc/rust/hir/tree/rust-hir-pattern-abstract.h')
0 files changed, 0 insertions, 0 deletions