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| author | Alexandre Oliva <oliva@adacore.com> | 2025-04-03 03:06:47 -0300 |
|---|---|---|
| committer | Alexandre Oliva <oliva@gnu.org> | 2025-04-03 03:06:47 -0300 |
| commit | b6d3a23cb027eb48a01ee5d70c6c72ab3bcde467 (patch) | |
| tree | 9d33f15c4adee60df1e827c9f67313f1a3fd287a /gcc/rust/backend/rust-compile-asm.h | |
| parent | 6f72af0c2e389e9252b6994643155e51ef68821b (diff) | |
| download | gcc-b6d3a23cb027eb48a01ee5d70c6c72ab3bcde467.zip gcc-b6d3a23cb027eb48a01ee5d70c6c72ab3bcde467.tar.gz gcc-b6d3a23cb027eb48a01ee5d70c6c72ab3bcde467.tar.bz2 | |
[testsuite] [riscv] limit mcpu-xiangshan-nanhu.c to rv64
The testcase makes the -march option conditional on rv64, and #errors
out if the desired CPU properties are not active. This makes the test
fail on rv32. Arrange to skip the test on rv32 instead, moving the
rv64 conditional.
for gcc/testsuite/ChangeLog
* gcc.target/riscv/mcpu-xiangshan-nanhu.c: Skip on non-rv64.
Diffstat (limited to 'gcc/rust/backend/rust-compile-asm.h')
0 files changed, 0 insertions, 0 deletions