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| author | Jiawei <jiawei@iscas.ac.cn> | 2025-06-24 17:34:05 +0800 |
|---|---|---|
| committer | Jiawei <jiawei@iscas.ac.cn> | 2025-06-25 10:07:31 +0800 |
| commit | e858dc702147b7de560afad165e7f16e3ee7d6c9 (patch) | |
| tree | 7a1a5cb7ec67070bd20568888142541d4cd4d4b7 /gcc/common | |
| parent | aaf55e09b3d97164615e783d98cfa842f382559d (diff) | |
| download | gcc-e858dc702147b7de560afad165e7f16e3ee7d6c9.zip gcc-e858dc702147b7de560afad165e7f16e3ee7d6c9.tar.gz gcc-e858dc702147b7de560afad165e7f16e3ee7d6c9.tar.bz2 | |
RISC-V: Add Profiles RVA/B23S64 support.
This patch adds support for the RISC-V Profiles RVA23S64 and RVB23S64.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: New Profiles.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-rva23s.c: New test.
* gcc.target/riscv/arch-rvb23s.c: New test.
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/riscv/riscv-common.cc | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 3c25848..82037a3 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -295,6 +295,15 @@ static const riscv_profiles riscv_profiles_table[] = "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" "_zfa_zawrs_supm"}, + /* RVA23S contains all mandatory base ISA for RVA23U64 and the privileged + extensions as mandatory extensions. */ + {"rva23s64", "rv64imafdcbv_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" + "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop" + "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" + "_zfa_zawrs_svbare_svade_ssccptr_sstvecd_sstvala_sscounterenw_svpbmt" + "_svinval_svnapot_sstc_sscofpmf_ssnpm_ssu64xl_sha_supm" + }, + /* RVB23 contains all mandatory base ISA for RVA22U64 and the new extension 'zihintntl,zicond,zimop,zcmop,zfa,zawrs' as mandatory extensions. */ @@ -303,7 +312,14 @@ static const riscv_profiles riscv_profiles_table[] = "_zicboz_zfhmin_zkt_zihintntl_zicond_zimop_zcmop_zcb" "_zfa_zawrs"}, - /* Currently we do not define S/M mode Profiles in gcc part. */ + /* RVB23S contains all mandatory base ISA for RVB23U64 and the privileged + extensions as mandatory extensions. */ + {"rvb23s64", "rv64imafdcb_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" + "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop" + "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" + "_zfa_zawrs_svbare_svade_ssccptr_sstvecd_sstvala_sscounterenw_svpbmt" + "_svinval_svnapot_sstc_sscofpmf_ssu64xl_supm" + }, /* Terminate the list. */ {NULL, NULL} |