diff options
| author | Mingzhu Yan <yanmingzhu@iscas.ac.cn> | 2025-05-06 16:59:09 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2025-05-06 17:00:28 -0600 |
| commit | aed2a447c7ff4282621aa7941f840cb2ddc90354 (patch) | |
| tree | 2f288e808bf043949406323565e42322b6761420 /gcc/common | |
| parent | 62ffaef514aad0eae5d3bc548d8e86d21a3095e7 (diff) | |
| download | gcc-aed2a447c7ff4282621aa7941f840cb2ddc90354.zip gcc-aed2a447c7ff4282621aa7941f840cb2ddc90354.tar.gz gcc-aed2a447c7ff4282621aa7941f840cb2ddc90354.tar.bz2 | |
[PATCH] RISC-V: Recognized svadu and svade extension
This patch support svadu and svade extension.
To enable GCC to recognize and process svadu and svade extension correctly at compile time.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (riscv_ext_version_table): New
extension.
(riscv_ext_flag_table) Ditto.
* config/riscv/riscv.opt: New mask.
* doc/invoke.texi (RISC-V Options): New extension
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-45.c: New test.
* gcc.target/riscv/arch-46.c: New test.
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/riscv/riscv-common.cc | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 145a0f2..58c7d20 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -441,6 +441,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"ssstateen", ISA_SPEC_CLASS_NONE, 1, 0}, {"sstc", ISA_SPEC_CLASS_NONE, 1, 0}, + {"svade", ISA_SPEC_CLASS_NONE, 1, 0}, + {"svadu", ISA_SPEC_CLASS_NONE, 1, 0}, {"svinval", ISA_SPEC_CLASS_NONE, 1, 0}, {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0}, {"svpbmt", ISA_SPEC_CLASS_NONE, 1, 0}, @@ -1764,9 +1766,11 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = RISCV_EXT_FLAG_ENTRY ("zcmp", x_riscv_zc_subext, MASK_ZCMP), RISCV_EXT_FLAG_ENTRY ("zcmt", x_riscv_zc_subext, MASK_ZCMT), - RISCV_EXT_FLAG_ENTRY ("svinval", x_riscv_sv_subext, MASK_SVINVAL), - RISCV_EXT_FLAG_ENTRY ("svnapot", x_riscv_sv_subext, MASK_SVNAPOT), - RISCV_EXT_FLAG_ENTRY ("svvptc", x_riscv_sv_subext, MASK_SVVPTC), + RISCV_EXT_FLAG_ENTRY ("svade", x_riscv_sv_subext, MASK_SVADE), + RISCV_EXT_FLAG_ENTRY ("svadu", x_riscv_sv_subext, MASK_SVADU), + RISCV_EXT_FLAG_ENTRY ("svinval", x_riscv_sv_subext, MASK_SVINVAL), + RISCV_EXT_FLAG_ENTRY ("svnapot", x_riscv_sv_subext, MASK_SVNAPOT), + RISCV_EXT_FLAG_ENTRY ("svvptc", x_riscv_sv_subext, MASK_SVVPTC), RISCV_EXT_FLAG_ENTRY ("ztso", x_riscv_ztso_subext, MASK_ZTSO), |