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authorKito Cheng <kito.cheng@sifive.com>2025-04-09 21:58:23 +0800
committerKito Cheng <kito.cheng@sifive.com>2025-04-10 17:03:38 +0800
commit9e48698228dbf1bbebba3a52d7ae2f47fee89624 (patch)
tree062211860811426e90bf0df635edaff3403241bd
parent6284f555e877c75ddecc776286ec4b8c20007de2 (diff)
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RISC-V: Include local riscv_vector.h in testsuite
That could prevent us including stdint.h from glibc, and that will cause problem when the corresponding multilib isn't built. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c: Include local riscv_vector.h. * gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c: Ditto. * gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c: Ditto. * gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: Ditto. * gcc.target/riscv/rvv/base/abi-callee-saved-1.c: Ditto. * gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c: Ditto. * gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: Ditto. * gcc.target/riscv/rvv/base/abi-callee-saved-2.c: Ditto. * gcc.target/riscv/rvv/base/bug-10-2.c: Ditto. * gcc.target/riscv/rvv/base/bug-10.c: Ditto. * gcc.target/riscv/rvv/base/bug-7.c: Ditto. * gcc.target/riscv/rvv/base/bug-8.c: Ditto. * gcc.target/riscv/rvv/base/bug-9.c: Ditto. * gcc.target/riscv/rvv/base/pr110943.c: Ditto. * gcc.target/riscv/rvv/base/pr112431-21.c: Ditto. * gcc.target/riscv/rvv/base/pr114639-1.c: Ditto. * gcc.target/riscv/rvv/base/pr115068.c: Ditto. * gcc.target/riscv/rvv/base/pr117286.c: Ditto. * gcc.target/riscv/rvv/base/pr117544.c: Ditto. * gcc.target/riscv/rvv/base/pr117955.c: Ditto. * gcc.target/riscv/rvv/base/pr118872.c: Ditto. * gcc.target/riscv/rvv/base/vlmul_ext-1.c: Ditto. * gcc.target/riscv/rvv/base/vssubu-1.c: Ditto. * gcc.target/riscv/rvv/base/vssubu-2.c: Ditto. * gcc.target/riscv/rvv/base/vwaddsub-1.c: Ditto. * gcc.target/riscv/rvv/vsetvl/pr111234.c: Ditto. * gcc.target/riscv/rvv/vsetvl/pr115214.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vsetvl-24.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c: Ditto. * gcc.target/riscv/rvv/xtheadvector/pr116591.c: Ditto. * gcc.target/riscv/rvv/xtheadvector/pr116592.c: Ditto. * gcc.target/riscv/rvv/xtheadvector/pr118357.c: Ditto. * gcc.target/riscv/rvv/xtheadvector/vsext.c: Ditto. * gcc.target/riscv/rvv/xtheadvector/vzext.c: Ditto.
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/bug-10-2.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/bug-10.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/bug-9.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr110943.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-21.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr114639-1.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr117286.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr117544.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr117955.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/pr118872.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_ext-1.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-1.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-2.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118357.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c2
35 files changed, 35 insertions, 35 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c
index 638e90f..69a94d5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gczve32x -mabi=lp64d -mrvv-vector-bits=zvl" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar (int8_t *data);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c
index 380d0c1..5e0f136 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gcv_zvl4096b -mabi=lp64d -mrvv-vector-bits=zvl" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar (int8_t *data);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c
index 9ed72a6..a3c0a6d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d -msave-restore" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar (int8_t *data);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c
index b6b708f..b1cf6aa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gv_zfh_zca_zcmp -mabi=lp64d -fno-shrink-wrap-separate" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar (int8_t *data);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c
index 13e3328..8838f0d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar (int8_t *data);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c
index d21b810..77f1c7c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d -msave-restore" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar1 (vint8m1_t a);
void bar2 ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c
index 70a32d7..37127a8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gv_zfh_zca_zcmp -mabi=lp64d -fno-shrink-wrap-separate" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar1 (vint8m1_t a);
void bar2 ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c
index 3f2cb2f..a8daeeb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c
@@ -2,7 +2,7 @@
/* { dg-options "-O1 -march=rv64gcv_zfh -mabi=lp64d" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar1 (vint8m1_t a);
void bar2 ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10-2.c
index fe3a1ef..f8143b9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10-2.c
@@ -4,7 +4,7 @@
/* { dg-require-effective-target riscv_zvfh_ok } */
/* { dg-options " -march=rv64gcv_zvfh -mabi=lp64d -O2" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
int8_t a[1];
uint16_t b[1];
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10.c b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10.c
index 60fdfc4..05628d5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-10.c
@@ -4,7 +4,7 @@
/* { dg-require-effective-target riscv_zvfh_ok } */
/* { dg-options " -march=rv64gcv_zvfh -mabi=lp64d -O2 --param=vsetvl-strategy=optim -fno-schedule-insns -fno-schedule-insns2 -fno-schedule-fusion " } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void
__attribute__ ((noipa))
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c
index 28766ce..3180f71 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c
@@ -3,7 +3,7 @@
/* { dg-options "-march=rv64gcv -mabi=lp64d -O2" { target { rv64 } } } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O2" { target { rv32 } } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vint64m1_t f1 (vint64m1_t vd, vint64m1_t vs2, size_t vl)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c
index 975f755..31b68c4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c
@@ -3,7 +3,7 @@
/* { dg-options "-march=rv64gcv -mabi=lp64d -O0" { target { rv64 } } } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O0" { target { rv32 } } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vint64m1_t f1 (vint64m1_t vd, vint64m1_t vs2, size_t vl)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-9.c b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-9.c
index 8cfe965..f7c9ad1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-9.c
@@ -3,7 +3,7 @@
/* { dg-options "-march=rv64gcv -mabi=lp64d -O2" { target { rv64 } } } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O2" { target { rv32 } } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vfloat16m1_t f0 (vfloat16m1_t vs2, vfloat16m1_t vs1, size_t vl)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr110943.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr110943.c
index 8a6c00f..a08ac6e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr110943.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr110943.c
@@ -2,7 +2,7 @@
/* { dg-options "-O3 -march=rv64gcv -mabi=lp64d" } */
/* { dg-final { check-function-bodies "**" "" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
/*
** foo9:
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-21.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-21.c
index 3e43c94..a0ed793 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-21.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-O3 -ansi -pedantic-errors -std=gnu99" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
size_t __attribute__ ((noinline))
sumation (size_t sum0, size_t sum1, size_t sum2, size_t sum3, size_t sum4,
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr114639-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr114639-1.c
index 3ad91db..c5b35c8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr114639-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr114639-1.c
@@ -2,7 +2,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
extern size_t get_vl ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c
index af2cba6..8144d29b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c
@@ -3,7 +3,7 @@
/* { dg-additional-options "-std=gnu99" } */
#include <stdint.h>
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vfloat64m8_t
test_vfwadd_wf_f64m8_m (vbool8_t vm, vfloat64m8_t vs2, float rs1, size_t vl)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr117286.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr117286.c
index dabb8ae..7b6eefe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr117286.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr117286.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O1" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
_Float16 a[10];
void func(){
int placeholder0 = 10;
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr117544.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr117544.c
index af3532a..81e0ec3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr117544.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr117544.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void bar() __attribute__((riscv_vector_cc));
vint32m1_t foo(vint32m1_t a, vint32m1_t b) {
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr117955.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr117955.c
index 81e3a6e..4904c92 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr117955.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr117955.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { rv64 } } } */
/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
_Float16 a (uint64_t);
int8_t b () {
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr118872.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr118872.c
index adb54d6..d62751e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr118872.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr118872.c
@@ -3,7 +3,7 @@
/* { dg-options "-march=rv64gcv -mabi=lp64d -O2" { target { rv64 } } } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O2" { target { rv32 } } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vfloat32m2_t foo (vfloat16m1_t a, size_t vl)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_ext-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_ext-1.c
index 4253729..6bb7e1c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_ext-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_ext-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vint16m8_t test_vlmul_ext_v_i16mf4_i16m8(vint16mf4_t op1) {
return __riscv_vlmul_ext_v_i16mf4_i16m8(op1);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-1.c
index 606854b..a278709 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -march=rv64gcv -mabi=lp64d" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vuint64m1_t test_vssubu_vx_u64m1(vuint64m1_t op1)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-2.c
index 78abd09..2f8c146 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vssubu-2.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -march=rv32gcv -mabi=ilp32d" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vuint64m1_t test_vssubu_vx_u64m1(vuint64m1_t op1)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c
index 84d3c4c..c0ca9fc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c
@@ -3,7 +3,7 @@
/* { dg-additional-options "-std=gnu99 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
#include <stdint.h>
-#include <riscv_vector.h>
+#include "riscv_vector.h"
/*
** vwadd_wx_i64m8_m:
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c
index 871cf65..f594217 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void
f (vint32m1_t *in, vint64m2_t *out, vbool32_t *m, int b)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c
index b76760b..48f200f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c
@@ -2,7 +2,7 @@
/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3 -w -std=gnu17" } */
/* { dg-skip-if "" { *-*-* } { "-flto" } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
static inline __attribute__(()) int vaddq_f32();
static inline __attribute__(()) int vload_tillz_f32(int nlane) {
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c
index 7096159e..3867681 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
size_t foo ()
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c
index c155f56..3acbc73 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-3.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O2 -fdump-rtl-vsetvl-details" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
uint64_t a[2], b[2];
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c
index 04a8ff2..2b2fe27 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-4.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 -fno-schedule-insns -fdump-rtl-vsetvl-details" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vuint16m1_t
foo (vuint16m1_t a, vuint16m1_t b, size_t avl)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c
index dfaf82c..ad27c38 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c
@@ -2,7 +2,7 @@
/* { dg-options "-march=rv32gc_xtheadvector -mabi=ilp32d -O2 -save-temps" { target { rv32 } } } */
/* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O2 -save-temps" { target { rv64 } } } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
void
foo (float *a, int b)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c
index a7cd8c5..c8056a8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c
@@ -3,7 +3,7 @@
/* { dg-options "-march=rv64gc_zfh_xtheadvector -mabi=lp64d -O2 -save-temps" { target { rv64 } } } */
#include <math.h>
-#include <riscv_vector.h>
+#include "riscv_vector.h"
static vfloat32m8_t atan2_ps(vfloat32m8_t a, vfloat32m8_t b, size_t vl)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118357.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118357.c
index aebb0e3..b3c3428 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118357.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118357.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { rv64 } } } */
/* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O2" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
vfloat16m4_t foo (float *ptr, size_t vl)
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c
index 55db283..42fa43e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { rv64 } } } */
/* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O3" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
struct a
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c
index fcb5659..d622b72 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { rv64 } } } */
/* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O3" } */
-#include <riscv_vector.h>
+#include "riscv_vector.h"
struct a
{