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author | Richard Sandiford <richard.sandiford@arm.com> | 2025-08-04 11:45:30 +0100 |
---|---|---|
committer | Richard Sandiford <richard.sandiford@arm.com> | 2025-08-04 11:45:30 +0100 |
commit | 2b419b709123194d3124a57c57556b0185fd2684 (patch) | |
tree | 3d8c44e0364aa4b47dfcd561866d1ff33c14b1cb | |
parent | dcb02ff8229882cbfb04155643054c1535244d7b (diff) | |
download | gcc-2b419b709123194d3124a57c57556b0185fd2684.zip gcc-2b419b709123194d3124a57c57556b0185fd2684.tar.gz gcc-2b419b709123194d3124a57c57556b0185fd2684.tar.bz2 |
aarch64: Use VNx16BI for svunpklo/hi_b
This patch continues the work of making ACLE intrinsics use VNx16BI
for svbool_t results. It deals with the svunpk* intrinsics.
gcc/
* config/aarch64/aarch64-sve.md (@aarch64_sve_punpk<perm_hilo>_acle)
(*aarch64_sve_punpk<perm_hilo>_acle): New patterns.
* config/aarch64/aarch64-sve-builtins-base.cc
(svunpk_impl::expand): Use them for boolean svunpk*.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/unpkhi_1.c: New test.
* gcc.target/aarch64/sve/acle/general/unpklo_1.c: Likewise.
-rw-r--r-- | gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64-sve.md | 28 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c | 24 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c | 24 |
4 files changed, 77 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc index 0d871a1..d484bb2 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc @@ -3252,7 +3252,7 @@ public: unsigned int unpacks = m_high_p ? UNSPEC_UNPACKSHI : UNSPEC_UNPACKSLO; insn_code icode; if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL) - icode = code_for_aarch64_sve_punpk (unpacku, mode); + icode = code_for_aarch64_sve_punpk_acle (unpacku); else { int unspec = e.type_suffix (0).unsigned_p ? unpacku : unpacks; diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 2037dde..a3f9b9a 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -10582,6 +10582,34 @@ "punpk<perm_hilo>\t%0.h, %1.b" ) +(define_expand "@aarch64_sve_punpk<perm_hilo>_acle" + [(set (match_operand:VNx16BI 0 "register_operand") + (and:VNx16BI + (subreg:VNx16BI + (unspec:VNx8BI + [(match_operand:VNx16BI 1 "register_operand")] + UNPACK_UNSIGNED) + 0) + (match_dup 2)))] + "TARGET_SVE" + { + operands[2] = aarch64_ptrue_all (2); + } +) + +(define_insn "*aarch64_sve_punpk<perm_hilo>_acle" + [(set (match_operand:VNx16BI 0 "register_operand" "=Upa") + (and:VNx16BI + (subreg:VNx16BI + (unspec:VNx8BI + [(match_operand:VNx16BI 1 "register_operand" "Upa")] + UNPACK_UNSIGNED) + 0) + (match_operand:VNx8BI 2 "aarch64_ptrue_all_operand")))] + "TARGET_SVE" + "punpk<perm_hilo>\t%0.h, %1.b" +) + ;; ========================================================================= ;; == Vector partitioning ;; ========================================================================= diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c new file mode 100644 index 0000000..9c7b4bc --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include <arm_sve.h> + +svbool_t +test1 (svbool_t p) +{ + return svand_z (svptrue_b8 (), svunpkhi (p), svptrue_b16 ()); +} + +svbool_t +test2 (svbool_t p) +{ + return svand_z (svptrue_b16 (), svunpkhi (p), svptrue_b8 ()); +} + +svbool_t +test3 (svbool_t p) +{ + return svand_z (svptrue_b16 (), svunpkhi (p), svptrue_b16 ()); +} + +/* { dg-final { scan-assembler-not {\tand\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c new file mode 100644 index 0000000..f072a2f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include <arm_sve.h> + +svbool_t +test1 (svbool_t p) +{ + return svand_z (svptrue_b8 (), svunpklo (p), svptrue_b16 ()); +} + +svbool_t +test2 (svbool_t p) +{ + return svand_z (svptrue_b16 (), svunpklo (p), svptrue_b8 ()); +} + +svbool_t +test3 (svbool_t p) +{ + return svand_z (svptrue_b16 (), svunpklo (p), svptrue_b16 ()); +} + +/* { dg-final { scan-assembler-not {\tand\t} } } */ |