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| author | Tsung Chun Lin <tclin914@gmail.com> | 2024-10-08 17:44:38 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2024-10-08 17:45:24 -0600 |
| commit | 2990f5802a727cbd717587c3a345fa940193049f (patch) | |
| tree | 3de96722f74226fb0fed8e3e8553330d55ca3784 | |
| parent | 0a193466f2e87acef9b86e0d086bc6f6017518b0 (diff) | |
| download | gcc-2990f5802a727cbd717587c3a345fa940193049f.zip gcc-2990f5802a727cbd717587c3a345fa940193049f.tar.gz gcc-2990f5802a727cbd717587c3a345fa940193049f.tar.bz2 | |
RISC-V: Enable builtin __riscv_mul with Zmmul extension.
From d5b254e19d1f37fe27c7e98a0160e5c22446cfea Mon Sep 17 00:00:00 2001
From: Jim Lin <jim@andestech.com>
Date: Tue, 8 Oct 2024 13:14:32 +0800
Subject: [PATCH] RISC-V: Enable builtin __riscv_mul with Zmmul extension.
gcc/ChangeLog:
* config/riscv/riscv-c.cc: (riscv_cpu_cpp_builtins):
Enable builtin __riscv_mul with Zmmul extension.
| -rw-r--r-- | gcc/config/riscv/riscv-c.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc index 71112d9..7e9c478 100644 --- a/gcc/config/riscv/riscv-c.cc +++ b/gcc/config/riscv/riscv-c.cc @@ -123,7 +123,7 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) if (TARGET_ATOMIC) builtin_define ("__riscv_atomic"); - if (TARGET_MUL) + if (TARGET_ZMMUL) builtin_define ("__riscv_mul"); if (TARGET_DIV) builtin_define ("__riscv_div"); |