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| author | Xi Ruoyao <xry111@xry111.site> | 2025-03-01 11:46:47 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2025-08-18 09:09:35 +0800 |
| commit | 1f1ab36058abc80c306ad022540df1c4f835612f (patch) | |
| tree | e68b714afaf50ce918506a620aaf4bd6b50fbda6 | |
| parent | 2ac0e38a3099b6422199553ae29b8b333bb9f5e7 (diff) | |
| download | gcc-1f1ab36058abc80c306ad022540df1c4f835612f.zip gcc-1f1ab36058abc80c306ad022540df1c4f835612f.tar.gz gcc-1f1ab36058abc80c306ad022540df1c4f835612f.tar.bz2 | |
LoongArch: Remove unneeded "andi offset, addr, 3" instruction in atomic_test_and_set
On LoongArch sll.w and srl.w instructions only take the [4:0] bits of
rk (shift amount) into account, and we've already defined
SHIFT_COUNT_TRUNCATED to 1 so the compiler knows this fact, thus we
don't need this instruction.
gcc/ChangeLog:
* config/loongarch/sync.md (atomic_test_and_set): Remove
unneeded andi instruction from the expansion.
| -rw-r--r-- | gcc/config/loongarch/sync.md | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/gcc/config/loongarch/sync.md b/gcc/config/loongarch/sync.md index a4cb409..b3666c0 100644 --- a/gcc/config/loongarch/sync.md +++ b/gcc/config/loongarch/sync.md @@ -366,15 +366,14 @@ rtx aligned_mem = change_address (mem, SImode, aligned_addr); set_mem_alias_set (aligned_mem, 0); - rtx offset = gen_reg_rtx (SImode); - emit_move_insn (offset, gen_rtx_AND (SImode, gen_lowpart (SImode, addr), - GEN_INT (3))); - rtx tmp = gen_reg_rtx (SImode); emit_move_insn (tmp, GEN_INT (1)); + /* Note that we have defined SHIFT_COUNT_TRUNCATED to 1, so we don't need + to mask addr with 0b11 here. */ rtx shmt = gen_reg_rtx (SImode); - emit_move_insn (shmt, gen_rtx_ASHIFT (SImode, offset, GEN_INT (3))); + emit_move_insn (shmt, gen_rtx_ASHIFT (SImode, gen_lowpart (SImode, addr), + GEN_INT (3))); rtx word = gen_reg_rtx (SImode); emit_move_insn (word, gen_rtx_ASHIFT (SImode, tmp, shmt)); |