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2025-06-14or1k: Add support for numcores and coreid sprsStafford Horne1-0/+2
These are needed when running GCC tests for newlib toolchains built with multicore support. Without these SPRs we get the following warnings when running tests. spawn or1k-elf-run ./20000112-1.exe^M WARNING: l.mfspr with invalid SPR address 0x80^M WARNING: l.mfspr with invalid SPR address 0x81^M WARNING: l.mfspr with invalid SPR address 0x81^M WARNING: l.mfspr with invalid SPR address 0x81^M Support is added by defining the SPRs in the cgen machine definition and regenerating the machine code. In or1k/or1k.c we initialize NUMCORES to 1 and COREID to 0 as the sim has only one CPU. In or1k/traps.c we allow returning the NUMCORES and COREID spr values in the mfspr function. Signed-off-by: Stafford Horne <shorne@gmail.com>
2025-04-08Update copyright dates to include 2025Tom Tromey1-1/+1
This updates the copyright headers to include 2025. I did this by running gdb/copyright.py and then manually modifying a few files as noted by the script. Approved-By: Eli Zaretskii <eliz@gnu.org>
2024-01-12Update copyright year range in header of all files managed by GDBAndrew Burgess1-1/+1
This commit is the result of the following actions: - Running gdb/copyright.py to update all of the copyright headers to include 2024, - Manually updating a few files the copyright.py script told me to update, these files had copyright headers embedded within the file, - Regenerating gdbsupport/Makefile.in to refresh it's copyright date, - Using grep to find other files that still mentioned 2023. If these files were updated last year from 2022 to 2023 then I've updated them this year to 2024. I'm sure I've probably missed some dates. Feel free to fix them up as you spot them.
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker1-1/+1
This commit is the result of running the gdb/copyright.py script, which automated the update of the copyright year range for all source files managed by the GDB project to be updated to include year 2023.
2022-12-23sim: or1k: move arch-specific settings to internal headerMike Frysinger1-0/+1
There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so move it all out to the existing or1k-sim.h. Unfortunately, we can't yet drop the or1k-sim.h include from sim-main.h as many of the generated CGEN files refer only to sim-main.h. We'll have to improve the CGEN interface before we can make more progress, but this is at least a minor improvement.
2022-12-21sim: or1k: invert sim_cpu storageMike Frysinger1-7/+11
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-06-18sim: split sim-signal.h include outMike Frysinger1-0/+1
The sim-basics.h is too big and includes too many things. This leads to some arch's sim-main.h having circular loop issues with defs, and makes it hard to separate out common objects from arch-specific defs. By splitting up sim-basics.h and killing off sim-main.h, it'll make it easier to separate out the two.
2021-06-09sim: cgen: inline cgen_init logicMike Frysinger1-1/+1
This function has done only one thing: post-process command line settings to see if profiling or tracing has been enabled, and if so, set the run_fast_p flag in the simulator state. That flag is only used in one place: to select the fast or slow cgen engine. By inlining the run_fast_p logic to the one place it's used, we can delete a good amount of logic specific to cgen ports: both the call to cgen_init and the conditional simulator state. This in turn allows us to have a single simulator state struct across all ports so we can share objects more between them, and makes the sim_open calls look more consistent.
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-0/+3
The defs.h header will take care of including the various config.h headers. For now, it's just config.h, but we'll add more when we integrate gnulib in. This header should be used instead of config.h, and should be the first include in every .c file. We won't rely on the old behavior where we expected files to include the port's sim-main.h which then includes the common sim-basics.h which then includes config.h. We have a ton of code that includes things before sim-main.h, and it sometimes needs to be that way. Creating a dedicated header avoids the ordering mess and implicit inclusion that shows up otherwise.
2021-01-12sim: or1k: fix mixing of code & decl warningMike Frysinger1-3/+5
Use the correct style of declaring variables at top of scope. This fixes a few compiler warnings in the process.
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files
2017-12-12sim: or1k: add or1k target to simStafford Horne1-0/+299
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN based sim so the bulk of the code is generated from the .cpu files by CGEN. The engine decode and execute logic in mloop uses scache with pseudo-basic-block extraction and supports both full and fast (switch) modes. The sim does not implement an mmu at the moment. The sim does implement fpu instructions via the common sim-fpu implementation. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure.tgt: Add or1k sim. * or1k/README: New file. * or1k/Makefile.in: New file. * or1k/configure.ac: New file. * or1k/mloop.in: New file. * or1k/or1k-sim.h: New file. * or1k/or1k.c: New file. * or1k/sim-if.c: New file. * or1k/sim-main.h: New file. * or1k/traps.c: New file.