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2025-07-10sim: riscv: Fix build issue due to INSN_CLASS_C was changed to INSN_CLASS_ZCANelson Chu1-1/+1
2025-07-04sim: ppc: use correct macrosPietro Monteiro1-3/+3
2025-07-04sim: configury: fix obsolete macrosPietro Monteiro9-133/+35
2025-06-14or1k: Add support for numcores and coreid sprsStafford Horne4-0/+52
2025-05-19sim: testsuite: Fix build with host GCC15Dimitar Dimitrov1-3/+2
2025-04-25Fix d10v sim build with GCC 15Tom Tromey1-1/+1
2025-04-09sim: fix Makefile.in copyright datesSimon Marchi1-2/+2
2025-04-08Update copyright dates to include 2025Tom Tromey648-648/+648
2025-03-25Delete the ARM sub-directory of the SIM directory.Nick Clifton27-24624/+209
2025-03-07Fix missing int argument warningJan-Benedict Glaw1-1/+1
2025-01-14Fix a syntax error in sim/common/cgen-mem.hElla MA1-1/+1
2024-12-16Use correct type for saved signal handlerTom Tromey3-3/+3
2024-11-23[sim] Run spellcheck.sh in sim (part 2)Tom de Vries7-8/+8
2024-11-23[gdb/contrib] Add two words to common-misspellings.txtTom de Vries3-4/+4
2024-11-23[sim] Run spellcheck.sh in sim (part 1)Tom de Vries89-142/+142
2024-11-23[sim] Rename local variable in ARMul_NthRegTom de Vries1-3/+3
2024-08-12sim: pru: Fix test case assembly with latest GASDimitar Dimitrov1-4/+4
2024-06-10regen sim/frv files for copyright updateAlan Modra4-4/+4
2024-06-10autoupdate: replace obsolete macros AC_HELP_STRINGMatthieu Longo1-1/+1
2024-05-09sim: riscv: Fix build issue due to recent binutils commitBernd Edlinger1-1/+2
2024-04-15sim: riscv: Fix confusion with c.jal vs. c.addiwBernd Edlinger1-4/+4
2024-04-15sim: riscv: Make stack 16-byte alignedBernd Edlinger1-0/+2
2024-04-15sim: riscv: Fix PC at gdb breakpointsBernd Edlinger1-3/+1
2024-03-21sim/erc32: Rename EVENT_MAX -> MAX_EVENTSOrgad Shaneh2-4/+4
2024-02-24sim: no rule to make sim/ppc/Makefile.inAlan Modra2-2/+2
2024-02-13sim: riscv: Add support for compressed integer instructionsJaydeep Patil7-8/+437
2024-01-29sim: bpf: remove support for ldinddw and ldabsdw instructionsJose E. Marchesi2-28/+0
2024-01-23sim: sh: fix nested braces in struct initMike Frysinger3-1558/+2223
2024-01-22sim: riscv: Fix crash during instruction decodingJaydeep Patil1-1/+1
2024-01-22sim: frv: fix -Wincompatible-function-pointer-types warnings [PR sim/29752]Mike Frysinger6-63/+59
2024-01-22sim: Fix -Werror=shadow=local by changing mem to addr in sim_{read,write}Mark Wielaard6-40/+40
2024-01-22sim: Fix some -Werror=shadow=compatible-local issues in aarch64/simulator.cMark Wielaard1-34/+34
2024-01-22sim: Fix cc -Werror=shadow=local in cr16/simops.cMark Wielaard1-8/+8
2024-01-18sim: ppc: implement 128-bit register read/writes with sim-endian APIsMike Frysinger1-26/+8
2024-01-18sim: ppc: switch register read/writes to union to avoid aliasing issuesMike Frysinger1-50/+75
2024-01-15Regenerate two Makefile.in files to update Copyright headersMark Wielaard1-2/+2
2024-01-12sim: Fix compile errorsDimitar Dimitrov3-12/+12
2024-01-12Update copyright year range in header of all files managed by GDBAndrew Burgess671-673/+673
2024-01-11sim: ppc: return register error when unhandledMike Frysinger1-4/+2
2024-01-10sim: m32r: enable warnings in traps.cMike Frysinger2-4/+0
2024-01-10sim: m32r: fixup some of the int<->pointer castsMike Frysinger4-31/+94
2024-01-10sim: m32r: fix missing break statementMike Frysinger1-0/+1
2024-01-10sim: m32r: migrate ftime() to clock_gettime()Mike Frysinger1-5/+8
2024-01-10sim: m32r: cleanup unused variablesMike Frysinger1-3/+1
2024-01-10sim: igen: add printf attributes to the prototypes tooMike Frysinger1-4/+4
2024-01-10gdbsupport: tighten up libiberty code a bit with dnlMike Frysinger1-4/+1
2024-01-10sim: build: switch to gdbsupport/libiberty.m4Mike Frysinger5-13/+411
2024-01-10sim: ppc: rework defines.h to handle HAVE symbols defined to 0Mike Frysinger2-2/+2
2024-01-08sim: warnings: compile build tools with -Werror tooMike Frysinger4-5/+100
2024-01-08sim: igen: fix format-zero-length warningsMike Frysinger1-3/+7
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