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2022-08-16
i386: Add MAX_OPERAND_BUFFER_SIZE
H.J. Lu
1
-3
/
+6
2022-08-16
x86: shorten certain template names
Jan Beulich
1
-26
/
+32
2022-08-16
x86: template-ize certain vector conversion insns
Jan Beulich
3
-181
/
+167
2022-08-16
x86: template-ize vector packed byte/word integer insns
Jan Beulich
2
-763
/
+692
2022-08-16
x86: re-order AVX512 S/G templates
Jan Beulich
2
-185
/
+182
2022-08-16
x86: template-ize vector packed dword/qword integer insns
Jan Beulich
2
-615
/
+518
2022-08-16
x86: template-ize packed/scalar vector floating point insns
Jan Beulich
3
-3577
/
+3345
2022-08-16
revert "x86: Also pass -P to $(CPP) when processing i386-opc.tbl"
Jan Beulich
4
-32
/
+56
2022-08-11
ppc/svp64: support svindex instruction
Dmitry Selyutin
1
-0
/
+15
2022-08-11
ppc/svp64: support svremap instruction
Dmitry Selyutin
1
-0
/
+20
2022-08-11
ppc/svp64: support svshape instruction
Dmitry Selyutin
1
-0
/
+23
2022-08-11
ppc/svp64: support svstep instructions
Dmitry Selyutin
1
-0
/
+3
2022-08-11
ppc/svp64: support setvl instructions
Dmitry Selyutin
1
-0
/
+22
2022-08-11
ppc/svp64: introduce non-zero operand flag
Dmitry Selyutin
1
-0
/
+3
2022-08-11
ppc/svp64: support LibreSOC architecture
Dmitry Selyutin
2
-8
/
+14
2022-08-09
x86-64: adjust MOVQ to/from SReg attributes
Jan Beulich
2
-3
/
+3
2022-08-09
x86: adjust MOVSD attributes
Jan Beulich
2
-3
/
+3
2022-08-09
x86: fold AVX VGATHERDPD / VPGATHERDQ
Jan Beulich
2
-44
/
+8
2022-08-09
x86: allow use of broadcast with X/Y/Z-suffixed AVX512-FP16 insns
Jan Beulich
2
-54
/
+54
2022-08-09
x86/Intel: split certain AVX512-FP16 VCVT*2PH templates
Jan Beulich
2
-12
/
+108
2022-08-04
Don't use BFD_VMA_FMT in binutils
Alan Modra
1
-3
/
+3
2022-08-03
x86: properly mark i386-only insns
Jan Beulich
2
-30
/
+30
2022-08-03
x86: also use D for MOVBE
Jan Beulich
3
-19
/
+3
2022-08-02
x86: XOP shift insns don't really allow B suffix
Jan Beulich
2
-20
/
+20
2022-08-01
x86: SKINIT with operand needs IgnoreSize
Jan Beulich
2
-2
/
+2
2022-08-01
opcodes: LoongArch: add "ret" instruction to reduce typing
WANG Xuerui
1
-0
/
+1
2022-08-01
opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u...
WANG Xuerui
1
-19
/
+12
2022-08-01
Get rid of fprintf_vma and sprintf_vma
Alan Modra
5
-50
/
+17
2022-07-29
libopcodes/aarch64: add support for disassembler styling
Andrew Burgess
3
-177
/
+516
2022-07-29
x86: drop stray NoRex64 from KeyLocker insns
Jan Beulich
2
-6
/
+6
2022-07-25
libopcodes/ppc: add support for disassembler styling
Andrew Burgess
2
-30
/
+86
2022-07-25
LoongArch:opcodes: Add new reloc types.
liuzhensong
1
-170
/
+242
2022-07-21
Add ChangeLog entry from previous commit
Peter Bergner
1
-0
/
+10
2022-07-21
PowerPC: Create new MMA instruction masks and use them
Peter Bergner
1
-33
/
+39
2022-07-21
x86: replace wrong attributes on VCVTDQ2PH{X,Y}
Jan Beulich
2
-4
/
+4
2022-07-21
x86/Intel: correct AVX512F scatter insn element sizes
Jan Beulich
2
-8
/
+8
2022-07-20
Re: opcodes/arc: Implement style support in the disassembler
Alan Modra
1
-1
/
+1
2022-07-18
opcodes/arc: Implement style support in the disassembler
Claudiu Zissulescu
3
-46
/
+117
2022-07-18
x86: correct VMOVSH attributes
Jan Beulich
2
-5
/
+5
2022-07-18
x86: re-order insn template fields
Jan Beulich
3
-3720
/
+3728
2022-07-09
Regenerate with automake-1.15.1
Alan Modra
3
-901
/
+422
2022-07-08
libopcodes/s390: add support for disassembler styling
Andrew Burgess
2
-16
/
+72
2022-07-08
Update version to 2.39.50 and regenerate files
Nick Clifton
4
-590
/
+1026
2022-07-08
Add markers for 2.39 branch
Nick Clifton
1
-0
/
+4
2022-07-07
RISC-V: Added Zfhmin and Zhinxmin.
Tsukasa OI
1
-63
/
+63
2022-07-07
RISC-V: Fix disassembling Zfinx with -M numeric
Tsukasa OI
1
-1
/
+1
2022-07-06
x86: make D attribute usable for XOP and FMA4 insns
Jan Beulich
3
-706
/
+62
2022-07-04
opcodes/avr: Implement style support in the disassembler
Marcus Nilsson
3
-10
/
+55
2022-07-04
x86: fold Disp32S and Disp32
Jan Beulich
5
-12883
/
+12886
2022-07-04
x86: restore masking of displacement kinds
Jan Beulich
2
-12
/
+12
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