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path: root/opcodes/aarch64-opc.h
AgeCommit message (Expand)AuthorFilesLines
2022-11-14aarch64: Add support for Common Short Sequence Compression extensionAndre Vieira1-1/+2
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-02aarch64: Add maximum immediate value to aarch64_sys_regRichard Sandiford1-0/+4
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus1-0/+4
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus1-0/+26
2021-11-17aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus1-0/+1
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus1-1/+6
2021-11-17aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus1-0/+3
2021-03-31Use bool in opcodesAlan Modra1-10/+10
2021-03-29TRUE/FALSE simplificationAlan Modra1-6/+6
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-1/+2
2020-04-30AArch64: add GAS support for UDF instructionAlex Coplan1-0/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-17ubsan: aarch64: left shift cannot be represented in type 'int64_t'Alan Modra1-1/+1
2019-05-09[binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_Zm3_11_INDEX operand.Matthew Malcomson1-0/+2
2019-05-09[binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.Matthew Malcomson1-0/+1
2019-02-07AArch64: Add verifier for By elem Single and Double sized instructions.Tamar Christina1-1/+2
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das1-0/+11
2018-10-09[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das1-0/+8
2018-10-03AArch64: Add SVE constraints verifier.Tamar Christina1-0/+4
2018-05-15Implement Read/Write constraints on system registers on AArch64Tamar Christina1-0/+20
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-11-09Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina1-0/+3
2017-02-24[AArch64] Additional SVE instructionsRichard Sandiford1-2/+13
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-18[AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy1-0/+3
2016-11-18[AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy1-0/+1
2016-09-21[AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford1-0/+3
2016-09-21[AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford1-0/+7
2016-09-21[AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford1-0/+5
2016-09-21[AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford1-0/+1
2016-09-21[AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford1-0/+9
2016-09-21[AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford1-0/+14
2016-09-21[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford1-0/+1
2016-09-21[AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford1-0/+2
2016-09-21[AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford1-0/+16
2016-05-03Fix generation of AArhc64 instruction table.Szabolcs Nagy1-3/+0
2016-04-28Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton1-0/+3
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang1-0/+1
2014-03-05Update copyright yearsAlan Modra1-1/+1
2012-11-09Remove trailing redundant `;'H.J. Lu1-1/+1
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+392
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