rocket-tools/riscv-gnu-toolchain/binutils.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-06-28	RISC-V: Add Zabha extension CAS instructions.	Jiawei	1	-0/+6
2024-06-18	RISC-V: Add SiFive cease extension v1.0	Hau Hsu	1	-0/+3
2024-06-18	RISC-V: Support Zacas extension.	Gianluca Guida	1	-0/+11
2024-06-12	RISC-V: Support S[sm]csrind extension csrs.	Jiawei	1	-6/+40
2024-06-06	RISC-V: Add support for Zvfbfwma extension	Xiao Zeng	1	-0/+8
2024-06-06	RISC-V: Add support for Zvfbfmin extension	Xiao Zeng	1	-0/+8
2024-06-06	RISC-V: Add support for Zfbfmin extension	Xiao Zeng	1	-0/+8
2024-06-05	RISC-V: Add support for XCVmem extension in CV32E40P	Mary Bennett	1	-0/+49
2024-06-05	RISC-V: Add support for XCVbi extension in CV32E40P	Mary Bennett	1	-0/+5
2024-06-05	RISC-V: Add support for XCVelw extension in CV32E40P	Mary Bennett	1	-0/+3
2024-04-09	RISC-V: Support Zcmp push/pop instructions.	Jiawei	1	-0/+14
2024-03-28	RISC-V: Removed privileged spec 1.9.1 support in assembler.	Nelson Chu	1	-204/+185
2024-03-08	RISC-V: Support Zabha extension.	Jiawei	1	-0/+54
2024-01-04	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2023-12-14	RISC-V: Fix the wrong encoding and operand of the XTheadFmv extension.	Jin Ma	1	-4/+4
2023-12-01	RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0	Nelson Chu	1	-0/+57
2023-12-01	RISC-V: Zv*: Add support for Zvkb ISA extension	Christoph Müllner	1	-2/+2
2023-11-23	RISC-V: Add vector permutation instructions for T-Head VECTOR vendor extension	Jin Ma	1	-0/+10
2023-11-23	RISC-V: Add vector mask instructions for T-Head VECTOR vendor extension	Jin Ma	1	-0/+14
2023-11-23	RISC-V: Add floating-point arithmetic instructions for T-Head VECTOR vendor e...	Jin Ma	1	-0/+36
2023-11-23	RISC-V: Add fixed-point arithmetic instructions for T-Head VECTOR vendor exte...	Jin Ma	1	-0/+12
2023-11-23	RISC-V: Add integer arithmetic instructions for T-Head VECTOR vendor extension	Jin Ma	1	-0/+12
2023-11-23	RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extension	Jin Ma	1	-1/+36
2023-11-23	RISC-V: Add load/store segment instructions for T-Head VECTOR vendor extension	Jin Ma	1	-0/+169
2023-11-23	RISC-V: Add load/store instructions for T-Head VECTOR vendor extension	Jin Ma	1	-0/+33
2023-11-23	RISC-V: Add CSRs for T-Head VECTOR vendor extension	Jin Ma	1	-0/+7
2023-11-07	RISC-V: Add support for XCValu extension in CV32E40P	Mary Bennett	1	-0/+67
2023-11-07	RISC-V: Add support for XCVmac extension in CV32E40P	Mary Bennett	1	-0/+37
2023-10-19	RISC-V: Remove semicolons from DECLARE_INSN	Tsukasa OI	1	-15/+15
2023-10-17	RISC-V: Fix typo	Tsukasa OI	1	-1/+1
2023-09-05	RISC-V: Add 'Smcntrpmf' extension and its CSRs	Tsukasa OI	1	-4/+12
2023-08-15	RISC-V: Add support for the 'Zihintntl' extension	Tsukasa OI	1	-0/+26
2023-08-02	Revert "2.41 Release sources"	Sam James	1	-0/+38
2023-08-02	2.41 Release sourcesbinutils-2_41-release	Nick Clifton	1	-38/+0
2023-07-18	RISC-V: Supports Zcb extension.	Jiawei	1	-0/+38
2023-07-01	RISC-V: Add support for the Zvksh ISA extension	Christoph Müllner	1	-0/+8
2023-07-01	RISC-V: Add support for the Zvksed ISA extension	Christoph Müllner	1	-0/+11
2023-07-01	RISC-V: Add support for the Zvknh[a,b] ISA extensions	Christoph Müllner	1	-0/+11
2023-07-01	RISC-V: Add support for the Zvkned ISA extension	Christoph Müllner	1	-0/+35
2023-07-01	RISC-V: Add support for the Zvkg ISA extension	Christoph Müllner	1	-0/+8
2023-07-01	RISC-V: Add support for the Zvbc extension	Nathan Huckleberry	1	-0/+14
2023-07-01	RISC-V: Add support for the Zvbb ISA extension	Christoph Müllner	1	-0/+50
2023-06-30	RISC-V: Add support for the Zfa extension	Christoph Müllner	1	-0/+99
2023-06-27	RISC-V: Support Zicond extension	Philipp Tomsich	1	-0/+8
2023-04-26	RISC-V: Support XVentanaCondOps extension	Philipp Tomsich	1	-0/+8
2023-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2022-12-27	RISC-V: Fix T-Head Fmv vendor extension encoding	Christoph Müllner	1	-2/+2
2022-11-25	riscv: Add AIA extension support (Smaia, Ssaia)	Christoph Müllner	1	-0/+68
2022-11-19	RISC-V: Add 'Ssstateen' extension and its CSRs	Tsukasa OI	1	-13/+13
2022-11-17	RISC-V: Add T-Head Int vendor extension	Christoph Müllner	1	-0/+8