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2025-07-22Fix failing test: i386-avx-reverseShiven Kashyap1-2/+2
Running the standalone test `gdb.reverse` with the target board configuration `unix/-fPIE/-pie` leads to the following failure: ''' FAIL: gdb.reverse/i386-avx-reverse.exp: verify ymm15 before vbroadcastsd ''' This happens because the test expects values stored in `dyn_buf0`, but instead (in the test source) the address of the buffer itself got broadcast to xmm15 (and thus to ymm15). This happened because the pointer to the start of `dyn_buf0` wasn't dereferenced (see 'vpbroadcast_test' in 'i386-avx-reverse.c'): ''' asm volatile ("vbroadcastss %0, %%xmm15": : "m" (dyn_buf0)); ^ ''' and this consequently lead to the test failing for the next instruction (`vbroadcastsd`), which depended on the correct value being broadcast to the register. Also, updated the corresponding expected output (gdb.reverse/i386-avx-reverse.exp) to match. Tested on x86-64 Linux. Signed-off-by: Shiven Kashyap <shivenkashyap24@gmail.com> Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-07-11gdb/record: Add support for more vmov-style instructionsGuinevere Larsen1-0/+29
This commit adds support for a few more vmov instructions: * VMOV[LH|HL]PS * VMOVLPD * VMOVHP[S|D] * VMOVDDUP And associated tests. The testsuite had some minor re-working, adding a function to zero buffers, to make later tests less fragile.
2025-07-11gdb/record: add support for AVX conversion instructions.Guinevere Larsen1-0/+39
WIP This commit adds support for instructions to convert from one type to another, which are in the form: * VCVTDQ2[PS|PD] * VCVTPS2[DQ|PD] * VCVTPD2[PS|DQ] * VCVTSD2[SI|SS] * VCVTSI2[SS|SD] * VCVTSS2[SD|SI] * VCVTTP[S|D]2DQ * VCVTTS[S|D]2SI It also adds support to vpsadbw, since it was trivial and only one instruction. Finally, I have slightly reorder the case statements to keep them in numerical order.
2025-07-11gdb/record: add support for 'pack' AVX instructionsGuinevere Larsen1-0/+24
This commit adds support for the following instructions VPACK[S|U]S[WB|DW] and associated tests.
2025-07-11gdb/record: add support for comis instructionsGuinevere Larsen1-0/+23
This commit adds support for the following instructions: * VCOMIS[S|D] * VUCOMIS[S|D] And associanted tests.
2025-07-11gdb/record: add support for AVX blend instructionsGuinevere Larsen1-0/+27
This commit supports for the following instructions: * VBLENDP[S|D] * VBLENDVP[S|D] * VPBLEND[D|W|VB] and test them.
2025-07-11gdb/record: add support to vinsert and vextract instructionsGuinevere Larsen1-0/+40
This patch adds support for the following instructions: * VEXTRACT[F128|I128|PS] * VINSERT[F128|I128|PS] * VPEXTR[B|W|D|Q] And associated test. For some reason, it seems that the extract instructions deal with the output register as though it was the first source register, so they use ModRM.r/m and VEX.B, instead of the usual ModRM.reg and VEX.R. This meant that the opcode collision with vbroadcastsd wasn't trivial. It can be easily solved by checking the VEX.map_select field, so soslving it was very easy. The VPEXTR instructions had several complicated collisions, and notably, vpextrw to a register works completely different to any other instruction in the family, so the code is messy, but it should be correct.
2025-07-11gdb/record: add support for more AVX broadcast instructionsGuinevere Larsen1-1/+9
This commit adds support for 3 instructions: * VBROADCASTSS * VBROADCASTSD * VBROADCASTF128 and extends the function vpbroadcast_test to include these.
2025-07-11gdb/record: add support for permutation instructionsGuinevere Larsen1-0/+39
This commit adds recording support for the following instructions: * VPERM2[I|F]128 * VPERM[D|Q|PD|PS] * VPERMILP[S|D] And associated tests.
2025-07-11gdb/record: add support for AVX/AVX2 shuffle instructionsGuinevere Larsen1-0/+30
This commit adds support for the following instructions: * VPSHUF[B|D|HW|LW] * VSHUFP[S|D] and the associated test.
2025-07-11gdb/record: Add support for AVX/AVX2 shift instructionsGuinevere Larsen1-0/+47
This commit adds record-full support to the following instructions: * VPSLL[W|D|Q|DQ] * VPSRL[W|D|Q|DQ] * VPSRA[W|D] With both dynamic and constant shifts, and the associated tests. Notably, vpsraq is not available for AVX or AVX2 instruction sets, only AVX512. vpsradq does not seem to be available with any instruction set.
2025-07-11gdb/record: support more AVX arithmetic instructionsGuinevere Larsen1-0/+18
This commit adds support to the following AVX/AVX2 instructions: * VPADD[B|W|D|Q] * VPMUL[LW|LD|HW|HUW|UDQ] * VXORP[S|D] * VPAND[|N] This required some reworking on the loop that processes instruction prefixes, because the opcode for VPMULLD overlapped with a valid instruction prefix. To fix that, rather than using "goto out_prefixes", this commit changes the infinite loop to only run while we don't find another VEX prefix. That should be OK, as the intel manual (page 526 on the March 2024 edition) says that the VEX prefix is always the last one.
2025-07-08gdb/reverse: Add 2 AVX instructions VADDSUBPS and VADDSUBPDFirst Last1-0/+33
add support to recording 2 missing AVX instructions: vaddsubps and vaddsubpd, and add associated tests. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-04-08Update copyright dates to include 2025Tom Tromey1-1/+1
This updates the copyright headers to include 2025. I did this by running gdb/copyright.py and then manually modifying a few files as noted by the script. Approved-By: Eli Zaretskii <eliz@gnu.org>
2025-01-17gdb/reverse: Fix recording vmov[u|a]p[s|d] instructionsGuinevere Larsen1-8/+9
Tom de Vries reported that some of the test for the vmov[u|a]p[s|d] were failing. In my machine xmm3 was consistently set to 0x54, but apparently that is different depending on the system. This commit zeroes out xmm3 at the start of the test instead. While debugging the test failures, I also noticed an issue where the recording wasn't saving all the required memory. That happened because vmovs[s|d] shares its opcode with vmovap[s|d], meaning they seem to share code paths, but the latter encodes memory modification size on VEX.L whereas the former encodes in VEX.pp. So this commit fixed that, and made the relevant tests more robust and complete. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=32561 Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-01-14gdb/record: add support for AVX floating point arithmetic instructionsGuinevere Larsen1-0/+56
This commit adds support for the following types of instructions relating to floating poitn values: add, mul, sub, min, div, max. These are supported with packed or single values, and single or double precision. Some of the instructions had opcode clashes, however, considering the mechanics of recording the registers is the same on both instructions, this is just marked with a comment. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-01-14gdb/record: add support for floating point vunpck instructionsGuinevere Larsen1-0/+20
This commit adds support for the AVX instructions vunpck[l|h][ps|pd] instructions, which was pretty straightforward. This commit also fixes a mistake in the test, where "record stop" was used after the recording was already stopped, if it failed during vpunpck_test recording. It also improved the documentation at the start of the relevant .c function. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-01-14gdb/record: add support for floating point vmov instructionsGuinevere Larsen1-0/+61
This commit updates GDB's record-full to be able to record vmov[ss|sd] and vmov [u|a] [ps|pd] AVX instructions, and tests for them. Unlike the vmovdq[u|a] instructions, the aligned and unalgined versions of vmov?[ps|pd] have different opcodes. The mechanics of recording them is the same, but the aligned version has opcodes 0x28 and 0x29, while the unaligned has the same opcode as vmov[ss|sd] instruction, 0x10 and 0x11. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2024-11-22gdb/record: introduce recoding support for vporGuinevere Larsen1-4/+10
This commit adds recording support for the AVX instruction vpor, and the AVX2 extension. Since the encoding of vpor and vpxor are the same, and their semantics are basically the same, modulo the mathematical operation, they are handled by the same switch case block. This also updates the vpxor function, to test vpor and vpxor, and updates the name to vpor_xor_test to better reflect what it does. Approved-By: Tom Tromey <tom@tromey.com>
2024-11-22gdb/record: Add support for recording vpmovmskbGuinevere Larsen1-0/+18
This commit adds support for recording the AVX instruction vpmovmskb, and tests to the relevant file. The test didn't really support checking general purpose registers, so this commit also adds a proc to gdb.reverse/i386-avx-reverse.exp, which can be used to test them Approved-By: Tom Tromey <tom@tromey.com>
2024-11-22gdb/record: Add support for all vpcmpeq instructionsGuinevere Larsen1-0/+32
This commit adds support to recording instructions of the form VPCMPEQ[B|W|D]. They are all encoded in the same way and only differentiated by the opcode, so they are all processed together. This commit also updates the test to (quite exhaustively) test the new instruction. Approved-By: Tom Tromey <tom@tromey.com>
2024-11-22gdb/record: add support for vpxor instructionGuinevere Larsen1-0/+20
This commit adds support for recording the instruction vpxor, introduced in the AVX extension, and extended in AVX2 to use 256 bit registers. The test gdb.reverse/i386-avx-reverse.exp has been extended to test this instruction as well. Approved-By: Tom Tromey <tom@tromey.com>
2024-11-12gdb/testsuite: fix gdb.reverse/i386-avx-reverse.exp with clangGuinevere Larsen1-8/+13
The test gdb.reverse/i386-avx-reverse.exp was changed by the recent commit: commit 5bf288d5a88ab6d3fa9bd7bd070e624afd264dc6 Author: Guinevere Larsen <guinevere@redhat.com> Date: Fri Jul 26 17:31:14 2024 -0300 gdb/record: support AVX instructions VMOVDQ(U|A) when recording In that commit I added a few calls to the instruction vmovdqa to and from memory addresses. Because my local gcc testing always had aligned pointers, I thought this would always work, but clang (and maybe other compilers) might not do the same, which will cause vmovdqa to segfault, and the test to fail spectacularly. This commit fixes that by using the pre-existing precise-aligned-alloc to allocate the dynamic buffers, forcing them to be aligned to the required boundary for vmovdqa instruction to work. The code was then re-shuffled to keep the current clustering of instructions. Approved-By: Tom Tromey <tom@tromey.com>
2024-10-28gdb/record: add support to vzeroupper instructionGuinevere Larsen1-0/+19
This commit adds recording support for the AVX instruction vzeroupper, which zeroes the high bits of ymm registers 0..15. In the programmer's manual, it is explicitly states that ymm registers 16..31 won't be affected if present, so we only need to record the first 16 registers. We record ymm_h registers since only the higher bits are touched, and that reduces the memory footprint of the instruction. This instruction is tested differently as we want to confirm we're only saving the relevant registers, and we want to ensure we're saving all of them, so it makes use of "maint print record-instruction" to see exactly what was recorded. Approved-By: Tom Tromey <tom@tromey.com>
2024-10-28gdb/record: support AVX instructions VMOVDQ(U|A) when recordingGuinevere Larsen1-4/+38
This commit adds support for the instructions VMOVDQU and VMOVDQA, used to move values to/from 256 bit registers. Unfortunately, the programmer's manual is very incomplete (if not wrong) about these instructions, so the logic had to be reverse engineered from how gcc actually encodes the instruction. This commit also changes the memory regions from the test to store 256 bits, so its easier to test the instructions and that we're recording ymm registers correctly. Approved-By: Tom Tromey <tom@tromey.com>
2024-10-28gdb/record: Add recording support to vpbroadcast instructionsGuinevere Larsen1-0/+29
This commit adds recording support to all AVX and AVX2 instructions of the form vpbroadcast. GDB is not yet concerned about AVX512 in recording mode, so for now we only support the AVX2 registers and instructions. This commit also updates the gdb.reverse/i386-avx-reverse.exp to test broadcast instructions. Approved-By: Tom Tromey <tom@tromey.com>
2024-10-28gdb/record: add support to AVX unpack instructionsGuinevere Larsen1-0/+55
This commit adds support to recording instructions to unpack high or low data from XMM registers, identified by the mnemonics in the form: VPUNPCK [L|H] [BW|WD|DQ|QDQ]. All these instructions are encoded the exact same way, and only affect the destination register, making them trivial to implement together. It also updates the test gdb.reverse/i386-avx-reverse.exp to test these new instructions. The test always uses ymm because the vpunpck instructions overwrite the high bits, so we have to be able to record the full ymm register, not just the output size. Approved-By: Tom Tromey <tom@tromey.com>
2024-10-28gdb/record: add support to vmovd and vmovq instructionsGuinevere Larsen1-0/+97
This commit adds support to the x86_64 AVX instructions vmovd and vmovq. The programmers manuals for Intel and AMD describe these 2 instructions as being almost the same, but my local testing, using gcc 13.2 on Fedora 39, showed several differences and inconsistencies. The instruction is supposed to always use the 3-byte VEX prefix, but I could only find 2-byte versions. The instructions aren't differentiated by the VEX.w bit, but by opcodes and VEX.pp. This patch adds a test with many different uses for both vmovd and vmovq. It also updates the test gdb.reverse/step-precsave.exp to reference the generic "missing avx support" bug open in the bug tracker (17346), instead of pointing to one that specifically calls out to vmovd instructions. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=23188 Approved-By: Tom Tromey <tom@tromey.com>