rocket-tools/riscv-gnu-toolchain/binutils.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-11	add --enable-default-compressed-debug-sections-algorithm configure option	Martin Liska	5	-3/+40
2022-10-11	refactor usage of compressed_debug_section_type	Martin Liska	1	-25/+9
2022-10-11	Error: attempt to get value of unresolved symbol `L0'	Nick Clifton	2	-2/+12
2022-10-05	x86/gas: support quoted address scale factor in AT&T syntax	Jan Beulich	4	-12/+35
2022-10-05	Arm64: support CLEARBHB alias	Jan Beulich	2	-1/+3
2022-10-04	gas: NEWS: Mention the T-Head extensions that were recently added	Palmer Dabbelt	1	-0/+5
2022-10-04	Re: compress .gnu.debuglto_.debug_* sections if requested	Alan Modra	1	-13/+7
2022-10-04	compress .gnu.debuglto_.debug_* sections if requested	Martin Liska	1	-1/+3
2022-10-04	RISC-V/gas: allow generating up to 176-bit instructions with .insn	Jan Beulich	7	-10/+82
2022-10-04	RISC-V/gas: don't open-code insn_length()	Jan Beulich	1	-1/+1
2022-10-04	RISC-V/gas: drop stray call to install_insn()	Jan Beulich	1	-1/+0
2022-10-04	RISC-V/gas: drop riscv_subsets static variable	Jan Beulich	1	-18/+14
2022-10-04	RISC-V: don't cast expressions' X_add_number to long in diagnostics	Jan Beulich	1	-4/+4
2022-10-03	RISC-V: Assign DWARF numbers to vector registers	Tsukasa OI	3	-2/+73
2022-10-03	RISC-V: Add testcase for DWARF register numbers	Tsukasa OI	2	-0/+296
2022-09-30	RISC-V: Relax "fmv.[sdq]" requirements	Tsukasa OI	6	-0/+6
2022-09-30	RISC-V: Reorganize and enhance 'Zfinx' tests	Tsukasa OI	6	-106/+207
2022-09-30	RISC-V: Eliminate long-casts of X_add_number in diagnostics	Christoph Müllner	1	-8/+8
2022-09-30	RISC-V: fallout from "re-arrange opcode table for consistent alias handling"	Jan Beulich	4	-14/+14
2022-09-30	RISC-V: fix build after "Add support for arbitrary immediate encoding formats"	Jan Beulich	1	-4/+4
2022-09-30	RISC-V: drop stray INSN_ALIAS flags	Jan Beulich	2	-0/+35
2022-09-30	RISC-V: re-arrange opcode table for consistent alias handling	Jan Beulich	21	-159/+375
2022-09-30	x86: improve match_template()'s diagnostics	Jan Beulich	7	-67/+86
2022-09-30	x86/Intel: restrict suffix derivation	Jan Beulich	6	-61/+230
2022-09-30	LoongArch: Update ELF e_flags handling according to specification.	liuzhensong	1	-10/+10
2022-09-28	The help document of as misses some many options	Nick Clifton	4	-34/+90
2022-09-26	binutils, gdb: support zstd compressed debug sections	Fangrui Song	12	-47/+380
2022-09-23	RISC-V: Add Zawrs ISA extension support	Christoph Müllner	3	-0/+25
2022-09-22	RISC-V: Add T-Head MemPair vendor extension	Christoph Müllner	6	-0/+88
2022-09-22	RISC-V: Add support for literal instruction arguments	Christoph Müllner	1	-0/+10
2022-09-22	RISC-V: Add T-Head MemIdx vendor extension	Christoph Müllner	6	-0/+137
2022-09-22	RISC-V: Add T-Head FMemIdx vendor extension	Christoph Müllner	6	-0/+85
2022-09-22	RISC-V: Add T-Head MAC vendor extension	Christoph Müllner	3	-0/+27
2022-09-22	RISC-V: Add T-Head CondMov vendor extension	Christoph Müllner	3	-0/+19
2022-09-22	RISC-V: Add T-Head Bitmanip vendor extension	Christoph Müllner	16	-0/+141
2022-09-22	RISC-V: Add support for arbitrary immediate encoding formats	Christoph Müllner	1	-0/+74
2022-09-22	RISC-V: Add T-Head SYNC vendor extension	Christoph Müllner	6	-0/+40
2022-09-22	RISC-V: Add T-Head CMO vendor extension	Christoph Müllner	6	-0/+103
2022-09-22	RISC-V: Add generic support for vendor extensions	Christoph Müllner	1	-0/+14
2022-09-22	RISC-V: Add macro-only operands to validate_riscv_insn	Tsukasa OI	1	-0/+3
2022-09-21	RISC-V: Fix riscv_set_tso declaration	Tsukasa OI	1	-1/+1
2022-09-21	RISC-V: Set EF_RISCV_TSO also on .option arch	Tsukasa OI	1	-0/+3
2022-09-21	RISC-V: Implement Ztso extension	Shihua	2	-0/+19
2022-09-21	RISC-V: Always generate R_RISCV_CALL_PLT reloc for call in assembler.	Nelson Chu	3	-8/+4
2022-09-21	Re: PowerPC64 pcrel got relocs against local symbols	Alan Modra	1	-6/+52
2022-09-21	ppc/svp64: test setvl ms operand	Dmitry Selyutin	2	-0/+2
2022-09-20	LoongArch: Set macro SUB_SEGMENT_ALIGN to 0.	liuzhensong	1	-0/+2
2022-09-16	PowerPC64 pcrel got relocs against local symbols	Alan Modra	1	-0/+6
2022-09-16	RISC-V: Make g imply zmmul extension.	Nelson Chu	8	-8/+8
2022-09-15	bfd, binutils, gas: Remove/mark unused variables	Tsukasa OI	1	-3/+0