| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 7 days | x86: error handling in set_cpu_arch() | Jan Beulich | 1 | -30/+34 |
| 13 days | x86/APX: use D for 2-operand CFCMOVcc | Jan Beulich | 1 | -1/+7 |
| 13 days | x86/APX: optimize certain reg-only CFCMOVcc forms | Jan Beulich | 1 | -0/+35 |
| 2024-09-02 | Support ymm rounding control for Intel AVX10.2 | Haochen Jiang | 1 | -56/+64 |
| 2024-08-30 | x86: replace conditional operators used to calculate booleans | Jan Beulich | 1 | -10/+11 |
| 2024-08-30 | x86: limit RegRex64 use | Jan Beulich | 1 | -9/+7 |
| 2024-08-28 | x86: Report invalid TLS operator | H.J. Lu | 1 | -2/+2 |
| 2024-08-27 | x86: Report invalid TLS relocation name | H.J. Lu | 1 | -91/+98 |
| 2024-08-27 | x86: Allow R_386_TLS_LE_32 with KMOVD | H.J. Lu | 1 | -2/+2 |
| 2024-08-23 | x86: simplify SAE checking | Jan Beulich | 1 | -12/+10 |
| 2024-08-14 | x86: correct .insn with opcode extension and VEX/XOP/EVEX encoding | Jan Beulich | 1 | -1/+2 |
| 2024-07-31 | x86: move ginsn stuff | Jan Beulich | 1 | -1102/+3 |
| 2024-07-26 | x86: accept whitespace around prefix separator | Jan Beulich | 1 | -19/+30 |
| 2024-07-26 | x86/APX: optimize certain {nf}-form insns to BMI2 ones | Jan Beulich | 1 | -0/+107 |
| 2024-07-19 | x86: accept whitespace inside curly braces | Jan Beulich | 1 | -5/+18 |
| 2024-07-19 | x86: undo '{' being a symbol-start character | Jan Beulich | 1 | -14/+98 |
| 2024-07-19 | x86: split pseudo-prefix state from i386_insn | Jan Beulich | 1 | -196/+197 |
| 2024-07-19 | x86/APX: add CMPcc/CTESTcc cases to noreg64 tests | Jan Beulich | 1 | -11/+29 |
| 2024-07-12 | x86/APX: remove two inconsistencies | Jan Beulich | 1 | -18/+23 |
| 2024-07-12 | x86/APX: correct TEST/CTESTcc with 1st operand being a memory one | Jan Beulich | 1 | -4/+8 |
| 2024-07-05 | x86-64: Fix support for APX NF TLS IE with 2 operands | Lingling Kong | 1 | -3/+2 |
| 2024-07-04 | gas: Enhance arch-specific SFrame configuration descriptions | Jens Remus | 1 | -0/+5 |
| 2024-07-04 | x86: Remove unused SFrame CFI RA register variable | Jens Remus | 1 | -1/+0 |
| 2024-07-04 | Support APX CFCMOV | Cui, Lili | 1 | -1/+1 |
| 2024-07-03 | x86-64: Support APX NF TLS IE with 2 operands | Lingling Kong | 1 | -2/+8 |
| 2024-06-28 | x86/APX: apply NDD-to-legacy transformation to further CMOVcc forms | Jan Beulich | 1 | -1/+16 |
| 2024-06-28 | x86/APX: extend TEST-by-imm7 optimization to CTESTcc | Jan Beulich | 1 | -2/+8 |
| 2024-06-28 | x86/APX: optimize {nf}-form IMUL-by-power-of-2 to SHL | Jan Beulich | 1 | -0/+70 |
| 2024-06-28 | x86-64: restrict by-imm31 optimization | Jan Beulich | 1 | -12/+15 |
| 2024-06-28 | x86/APX: optimize certain {nf}-form insns to LEA | Jan Beulich | 1 | -8/+236 |
| 2024-06-28 | x86/APX: optimize {nf}-form rotate-by-width-less-1 | Jan Beulich | 1 | -1/+21 |
| 2024-06-28 | x86/APX: optimize {nf} forms of ADD/SUB with specific immediates | Jan Beulich | 1 | -1/+83 |
| 2024-06-21 | x86: optimize {,V}PEXTR{D,Q} with immediate of 0 | Jan Beulich | 1 | -0/+38 |
| 2024-06-21 | x86: optimize left-shift-by-1 | Jan Beulich | 1 | -0/+79 |
| 2024-06-21 | x86: %riz, %rip, and %eip don't require REX | Jan Beulich | 1 | -2/+2 |
| 2024-06-21 | x86: don't suppress errors when optimizing | Jan Beulich | 1 | -1/+16 |
| 2024-06-18 | Support APX CCMP and CTEST | Cui, Lili | 1 | -1/+145 |
| 2024-06-10 | x86/APX: convert ZU to operand constraint | Jan Beulich | 1 | -1/+5 |
| 2024-05-31 | x86: reduce check_{byte,word,long,qword}_reg() overhead | Jan Beulich | 1 | -4/+15 |
| 2024-05-29 | x86/Intel: warn about undue mnemonic suffixes | Jan Beulich | 1 | -0/+13 |
| 2024-05-29 | x86/Intel: SHLD/SHRD have dual meaning | Jan Beulich | 1 | -2/+5 |
| 2024-05-24 | x86: simplify VexVVVV_SRC2 handling for the XOP case | Jan Beulich | 1 | -9/+5 |
| 2024-05-24 | x86: simplify / consolidate check_{word,long,qword}_reg() | Jan Beulich | 1 | -16/+4 |
| 2024-05-24 | x86: correct VCVT{,U}SI2SD | Jan Beulich | 1 | -5/+47 |
| 2024-05-22 | Support APX zero-upper | Cui, Lili | 1 | -2/+3 |
| 2024-05-22 | X86: Remove "i.rex" to eliminate extra conditional branch | Cui, Lili | 1 | -1/+1 |
| 2024-05-22 | Add check for 8-bit old registers in EVEX format | Cui, Lili | 1 | -3/+4 |
| 2024-05-22 | x86: Split REX/REX2 old registers judgment. | Cui, Lili | 1 | -16/+14 |
| 2024-05-06 | x86: Drop using extension_opcode to encode vvvv register | Cui, Lili | 1 | -6/+3 |
| 2024-05-06 | x86: Drop SwapSources | Cui, Lili | 1 | -8/+11 |
