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-rw-r--r--sim/ppc/BUGS4
-rw-r--r--sim/ppc/INSTALL2
-rw-r--r--sim/ppc/README2
-rw-r--r--sim/ppc/RUN2
-rw-r--r--sim/ppc/altivec_registers.h2
-rw-r--r--sim/ppc/corefile.h6
-rw-r--r--sim/ppc/cpu.h4
-rw-r--r--sim/ppc/debug.c2
-rw-r--r--sim/ppc/device.h2
-rw-r--r--sim/ppc/emul_bugapi.c4
-rw-r--r--sim/ppc/gen-icache.c4
-rw-r--r--sim/ppc/gen-idecode.c2
-rw-r--r--sim/ppc/gen-semantics.h4
-rw-r--r--sim/ppc/hw_cpu.c2
-rw-r--r--sim/ppc/hw_eeprom.c2
-rw-r--r--sim/ppc/hw_ide.c4
-rw-r--r--sim/ppc/hw_init.c2
-rw-r--r--sim/ppc/hw_opic.c8
-rw-r--r--sim/ppc/hw_phb.c6
-rw-r--r--sim/ppc/idecode_expression.h2
-rw-r--r--sim/ppc/igen.c2
-rw-r--r--sim/ppc/igen.h4
-rw-r--r--sim/ppc/ld-decode.h4
-rw-r--r--sim/ppc/powerpc.igen16
-rw-r--r--sim/ppc/psim.c4
-rw-r--r--sim/ppc/psim.texinfo4
-rw-r--r--sim/ppc/std-config.h8
-rw-r--r--sim/ppc/tree.c2
-rw-r--r--sim/ppc/vm.c2
-rw-r--r--sim/ppc/vm.h2
30 files changed, 57 insertions, 57 deletions
diff --git a/sim/ppc/BUGS b/sim/ppc/BUGS
index 300c791..816f054 100644
--- a/sim/ppc/BUGS
+++ b/sim/ppc/BUGS
@@ -34,7 +34,7 @@ Better and more devices.
PORTABILITY:
(Notes taken from Michael Meissner): Heavy use of the ## operator -
-fix using the clasic X/**/Y hack; Use of the signed keyword. In
+fix using the classic X/**/Y hack; Use of the signed keyword. In
particular, signed char has no analogue in classic C (though most
implementations of classic C use signed chars); Use of long long which
restricts the target compiler to be GCC.
@@ -94,7 +94,7 @@ IGEN:
Igen at present can't do the following:
- o duplication is an all or nothing afair.
+ o duplication is an all or nothing affair.
It should be configurable according to
the instruction or the sub-table.
diff --git a/sim/ppc/INSTALL b/sim/ppc/INSTALL
index 22ead08..220ed4d 100644
--- a/sim/ppc/INSTALL
+++ b/sim/ppc/INSTALL
@@ -146,7 +146,7 @@ At the time of writing the following were outstanding:
the description of a target machine (including the initial
state of all processor registers) from a file.
- Unfortunatly GDB does not yet have a standard command that
+ Unfortunately GDB does not yet have a standard command that
facilitates the use of this feature. Until such a command is
added, the patch (hack?) gdb-4.15+attach.diff.gz can be used to
extend GDB's attach command so that it can be used to initialize
diff --git a/sim/ppc/README b/sim/ppc/README
index f5049e8..683d51f 100644
--- a/sim/ppc/README
+++ b/sim/ppc/README
@@ -173,7 +173,7 @@ contributed in their own unique way:
If PSIM doesn't monitor a components of interest,
the source code is freely available, and hence
- there is no hinderance to changing things
+ there is no hindrance to changing things
to meet a specific analysts needs.
diff --git a/sim/ppc/RUN b/sim/ppc/RUN
index 6c3cfef..07d6505 100644
--- a/sim/ppc/RUN
+++ b/sim/ppc/RUN
@@ -193,7 +193,7 @@ requirements.
The output from a performance run (on a P90) for the program
psim-test/profile/bench is below. In this run psim was fairly
-agressively configured (see the file INSTALL for compile time
+aggressively configured (see the file INSTALL for compile time
configuration).
CPU #1 executed 41,994 AND instructions.
diff --git a/sim/ppc/altivec_registers.h b/sim/ppc/altivec_registers.h
index 19d645c..3df5c63 100644
--- a/sim/ppc/altivec_registers.h
+++ b/sim/ppc/altivec_registers.h
@@ -46,7 +46,7 @@ struct altivec_regs {
/* AltiVec endian helpers, wrong endian hosts vs targets need to be
sure to get the right bytes/halfs/words when the order matters.
Note that many AltiVec instructions do not depend on byte order and
- work on N independant bits of data. This is only for the
+ work on N independent bits of data. This is only for the
instructions that actually move data around. */
#if (HOST_BYTE_ORDER == BIG_ENDIAN)
diff --git a/sim/ppc/corefile.h b/sim/ppc/corefile.h
index 9297f3e..be28d70 100644
--- a/sim/ppc/corefile.h
+++ b/sim/ppc/corefile.h
@@ -85,7 +85,7 @@ INLINE_CORE\
restarting it.
For callback maps it is possible to further order them by
- specifiying specifying a callback level (eg callback + 1).
+ specifying specifying a callback level (eg callback + 1).
When the core is resolving an access it searches each of the maps
in order. First raw-memory and then callback maps (in assending
@@ -119,7 +119,7 @@ INLINE_CORE\
The operation of mapping between an address and its destination
device or memory array is currently implemented using a simple
linked list. The posibility of replacing this list with a more
- powerfull data structure exists.
+ powerful data structure exists.
*/
@@ -171,7 +171,7 @@ INLINE_CORE\
Transfer (zero) a variable size block of data between the host and
target (possibly byte swapping it). Should any problems occure,
- the number of bytes actually transfered is returned. */
+ the number of bytes actually transferred is returned. */
INLINE_CORE\
(unsigned) core_map_read_buffer
diff --git a/sim/ppc/cpu.h b/sim/ppc/cpu.h
index dfd2244..b9f7885 100644
--- a/sim/ppc/cpu.h
+++ b/sim/ppc/cpu.h
@@ -139,7 +139,7 @@ INLINE_CPU\
#if WITH_IDECODE_CACHE_SIZE
-/* Return the cache entry that matches the given CIA. No guarentee
+/* Return the cache entry that matches the given CIA. No guarantee
that the cache entry actually contains the instruction for that
address */
@@ -160,7 +160,7 @@ INLINE_CPU\
inner vm maps, to have the cpu its self provide memory manipulation
functions. (eg cpu_instruction_fetch() cpu_data_read_4())
- Unfortunatly in addition to these functions is the need (for the
+ Unfortunately in addition to these functions is the need (for the
debugger) to be able to read/write to memory in ways that violate
the vm protection (eg store breakpoint instruction in the
instruction map). */
diff --git a/sim/ppc/debug.c b/sim/ppc/debug.c
index a9b48c3..74a37e9 100644
--- a/sim/ppc/debug.c
+++ b/sim/ppc/debug.c
@@ -39,7 +39,7 @@ typedef struct _trace_option_descriptor {
static trace_option_descriptor trace_description[] = {
{ trace_gdb, "gdb", "calls made by gdb to the sim_calls.c file" },
- { trace_os_emul, "os-emul", "VEA mode sytem calls - like strace" },
+ { trace_os_emul, "os-emul", "VEA mode system calls - like strace" },
{ trace_events, "events", "event queue handling" },
/* decode/issue */
{ trace_semantics, "semantics", "Instruction execution (issue)" },
diff --git a/sim/ppc/device.h b/sim/ppc/device.h
index 65c85e4..609afb5 100644
--- a/sim/ppc/device.h
+++ b/sim/ppc/device.h
@@ -430,7 +430,7 @@ INLINE_DEVICE\
disks file system. The operations would be implemented using the
basic block I/O model provided by the disk.
- This model includes methods that faciliate the creation of device
+ This model includes methods that facilitate the creation of device
instance and (should a given device support it) standard operations
on those instances.
diff --git a/sim/ppc/emul_bugapi.c b/sim/ppc/emul_bugapi.c
index 067e406..ae8b564 100644
--- a/sim/ppc/emul_bugapi.c
+++ b/sim/ppc/emul_bugapi.c
@@ -59,7 +59,7 @@
#define _NETWR 0x019 /* Write to host */
#define _NETCFIG 0x01a /* Configure network parameters */
#define _NETOPN 0x01b /* Open file for reading */
-#define _NETFRD 0x01c /* Retreive specified file blocks */
+#define _NETFRD 0x01c /* Retrieve specified file blocks */
#define _NETCTRL 0x01d /* Implement special control functions */
#define _OUTCHR 0x020 /* Output character (pointer / pointer format) */
#define _OUTSTR 0x021 /* Output string (pointer / pointer format) */
@@ -118,7 +118,7 @@ static const struct bug_map bug_mapping[] = {
{ _NETWR, ".NETWR -- Write to host" },
{ _NETCFIG, ".NETCFIG -- Configure network parameters" },
{ _NETOPN, ".NETOPN -- Open file for reading" },
- { _NETFRD, ".NETFRD -- Retreive specified file blocks" },
+ { _NETFRD, ".NETFRD -- Retrieve specified file blocks" },
{ _NETCTRL, ".NETCTRL -- Implement special control functions" },
{ _OUTCHR, ".OUTCHR -- Output character" },
{ _OUTSTR, ".OUTSTR -- Output string (pointer / pointer format)" },
diff --git a/sim/ppc/gen-icache.c b/sim/ppc/gen-icache.c
index d9b76ad..de483ba 100644
--- a/sim/ppc/gen-icache.c
+++ b/sim/ppc/gen-icache.c
@@ -102,7 +102,7 @@ print_icache_extraction(lf *file,
/* Define a storage area for the cache element */
if (what_to_declare == undef_variables) {
- /* We've finished with the value - destory it */
+ /* We've finished with the value - destroy it */
lf_indent_suppress(file);
lf_printf(file, "#undef %s\n", entry_name);
return;
@@ -482,7 +482,7 @@ print_icache_struct(insn_table *instructions,
}
else {
/* alernativly, since no cache, emit a dummy definition for
- idecode_cache so that code refering to the type can still compile */
+ idecode_cache so that code referring to the type can still compile */
lf_printf(file, "typedef void idecode_cache;\n");
}
lf_printf(file, "\n");
diff --git a/sim/ppc/gen-idecode.c b/sim/ppc/gen-idecode.c
index bbb1cc9..0f500c8 100644
--- a/sim/ppc/gen-idecode.c
+++ b/sim/ppc/gen-idecode.c
@@ -693,7 +693,7 @@ print_run_until_stop_body(lf *file,
{
/* Output the function to execute real code:
- Unfortunatly, there are multiple cases to consider vis:
+ Unfortunately, there are multiple cases to consider vis:
<icache> X <smp> X <events> X <keep-running-flag> X ...
diff --git a/sim/ppc/gen-semantics.h b/sim/ppc/gen-semantics.h
index 8d1804b..02e3c25 100644
--- a/sim/ppc/gen-semantics.h
+++ b/sim/ppc/gen-semantics.h
@@ -32,9 +32,9 @@
o cached - separate cracker and semantic
- Two independant functions are created. Firstly the
+ Two independent functions are created. Firstly the
function that cracks an instruction entering it into a
- cache and secondly the semantic function propper that
+ cache and secondly the semantic function proper that
uses the cache.
o cached - semantic + cracking semantic
diff --git a/sim/ppc/hw_cpu.c b/sim/ppc/hw_cpu.c
index df807c1..8857fed 100644
--- a/sim/ppc/hw_cpu.c
+++ b/sim/ppc/hw_cpu.c
@@ -118,7 +118,7 @@ hw_cpu_init_address(device *me)
/* Take the interrupt and synchronize its delivery with the clock. If
we've not yet scheduled an interrupt for the next clock tick, take
- the oportunity to do it now */
+ the opportunity to do it now */
static void
hw_cpu_interrupt_event(device *me,
diff --git a/sim/ppc/hw_eeprom.c b/sim/ppc/hw_eeprom.c
index 2bbcd77..1f58ca6 100644
--- a/sim/ppc/hw_eeprom.c
+++ b/sim/ppc/hw_eeprom.c
@@ -29,7 +29,7 @@
/* DEVICE
- eeprom - JEDEC? compatible electricaly erasable programable device
+ eeprom - JEDEC? compatible electricaly erasable programmable device
DESCRIPTION
diff --git a/sim/ppc/hw_ide.c b/sim/ppc/hw_ide.c
index af61eec..ce911e9 100644
--- a/sim/ppc/hw_ide.c
+++ b/sim/ppc/hw_ide.c
@@ -37,7 +37,7 @@
This device models the primary/secondary <<ide>> controller
described in the [CHRPIO] document.
- The controller has separate independant interrupt outputs for each
+ The controller has separate independent interrupt outputs for each
<<ide>> bus.
@@ -91,7 +91,7 @@
| i0,0,1c,6 1 \
| i0,0,20,0 8' \
- Note: the fouth and fifth reg entries specify that the register is
+ Note: the fourth and fifth reg entries specify that the register is
at an offset into the address specified by the base register
(<<assigned-addresses>>); Apart from restrictions placed by the
<<pci>> specification, no restrictions are placed on the number of
diff --git a/sim/ppc/hw_init.c b/sim/ppc/hw_init.c
index 804daa9..79dd646 100644
--- a/sim/ppc/hw_init.c
+++ b/sim/ppc/hw_init.c
@@ -182,7 +182,7 @@ static device_callbacks const hw_file_callbacks = {
eeprom requires a complex sequence of accesses). The
<<real-address>> is specified as <<0x0c00>> which is the offset
into the eeprom. For brevity, most of the eeprom properties have
- been omited.
+ been omitted.
| /iobus/eeprom@0xfff00000/reg 0xfff00000 0x80000
| /openprom/init/data@0xfff00c00/real-address 0x0c00
diff --git a/sim/ppc/hw_opic.c b/sim/ppc/hw_opic.c
index 4247411..f518b05 100644
--- a/sim/ppc/hw_opic.c
+++ b/sim/ppc/hw_opic.c
@@ -782,13 +782,13 @@ handle_interrupt(device *me,
else if (!src->is_level_triggered
&& src->is_positive_polarity
&& !asserted) {
- DTRACE(opic, ("interrupt %d - ignore falling edge (positive edge trigered)\n",
+ DTRACE(opic, ("interrupt %d - ignore falling edge (positive edge triggered)\n",
src->nr));
}
else if (!src->is_level_triggered
&& !src->is_positive_polarity
&& asserted) {
- DTRACE(opic, ("interrupt %d - ignore rising edge (negative edge trigered)\n",
+ DTRACE(opic, ("interrupt %d - ignore rising edge (negative edge triggered)\n",
src->nr));
}
else if (src->in_service != 0) {
@@ -879,7 +879,7 @@ do_end_of_interrupt_register_N_write(device *me,
DTRACE(opic, ("eoi %d - ignoring nonzero value\n", dest->nr));
}
- /* user doing wierd things? */
+ /* user doing weird things? */
if (dest->current_in_service == NULL) {
DTRACE(opic, ("eoi %d - strange, no current interrupt\n", dest->nr));
return;
@@ -1393,7 +1393,7 @@ timer_event(void *data)
opic_timer *timer = data;
device *me = timer->me;
if (timer->inhibited)
- device_error(timer->me, "internal-error - timer event occured when timer %d inhibited",
+ device_error(timer->me, "internal-error - timer event occurred when timer %d inhibited",
timer->nr);
handle_interrupt(timer->me, timer->opic, timer->interrupt_source, 1);
timer->timeout_event = device_event_queue_schedule(me, timer->base_count,
diff --git a/sim/ppc/hw_phb.c b/sim/ppc/hw_phb.c
index 06eb29f..ac0223d 100644
--- a/sim/ppc/hw_phb.c
+++ b/sim/ppc/hw_phb.c
@@ -90,7 +90,7 @@
Since device tree entries that are specified on the command line
are added before most of the device tree has been built it is often
- necessary to explictly add certain device properties and thus
+ necessary to explicitly add certain device properties and thus
ensure they are already present in the device tree. For the
<<phb>> one such property is parent busses <<#address-cells>>.
@@ -154,7 +154,7 @@
The Open Firmware PCI bus bindings document (rev 1.6) suggests that
the register field of non-relocatable PCI address should be zero.
- Unfortunatly, PCI addresses specified in the <<assigned-addresses>>
+ Unfortunately, PCI addresses specified in the <<assigned-addresses>>
property must be both non-relocatable and have non-zero register
fields.
@@ -316,7 +316,7 @@ hw_phb_attach_address(device *me,
if (phb_type != hw_phb_normal_decode && phb_type != hw_phb_subtractive_decode)
device_error(me, "attach type (%d) specified by %s invalid",
type, device_path(client));
- /* attach it to the relevent bus */
+ /* attach it to the relevant bus */
DTRACE(phb, ("attach %s - %s %s:0x%lx (0x%lx bytes)\n",
device_path(client),
hw_phb_decode_name(phb_type),
diff --git a/sim/ppc/idecode_expression.h b/sim/ppc/idecode_expression.h
index 86b3394..c44083c 100644
--- a/sim/ppc/idecode_expression.h
+++ b/sim/ppc/idecode_expression.h
@@ -48,7 +48,7 @@
/* 64bit target expressions:
- Unfortunatly 128bit arrithemetic isn't that common. Consequently
+ Unfortunately 128bit arrithemetic isn't that common. Consequently
the 32/64 bit trick can not be used. Instead all calculations are
required to retain carry/overflow information in separate
variables. Even with this restriction it is still possible for the
diff --git a/sim/ppc/igen.c b/sim/ppc/igen.c
index 635030d..5396771 100644
--- a/sim/ppc/igen.c
+++ b/sim/ppc/igen.c
@@ -365,7 +365,7 @@ main(int argc,
printf(" -C Include semantics in cache functions\n");
printf(" -S Include insn (instruction) in icache\n");
printf(" -R Use defines to reference cache vars\n");
- printf(" -L Supress line numbering in output files\n");
+ printf(" -L Suppress line numbering in output files\n");
printf(" -B <bit-size> Set the number of bits in an instruction\n");
printf(" -H <high-bit> Set the nr of the high (msb bit)\n");
printf(" -N <nr-cpus> Specify the max number of cpus the simulation will support\n");
diff --git a/sim/ppc/igen.h b/sim/ppc/igen.h
index 052806a..813632c 100644
--- a/sim/ppc/igen.h
+++ b/sim/ppc/igen.h
@@ -41,7 +41,7 @@ typedef enum {
generate_calls = 0x100,
- /* In addition, when refering to fields access them directly instead
+ /* In addition, when referring to fields access them directly instead
of via variables */
generate_calls_with_direct_access
@@ -116,7 +116,7 @@ extern int icache_size;
/* Instruction expansion?
- Should the semantic code for each instruction, when the oportunity
+ Should the semantic code for each instruction, when the opportunity
arrises, be expanded according to the variable opcode files that
the instruction decode process renders constant */
diff --git a/sim/ppc/ld-decode.h b/sim/ppc/ld-decode.h
index 4332dcc..046b97d 100644
--- a/sim/ppc/ld-decode.h
+++ b/sim/ppc/ld-decode.h
@@ -52,7 +52,7 @@
If an instruction field was found, enlarge the field size so that
it is forced to at least include bits starting from <force_first>
- (<force_last>). To stop this occuring, use <force_first> = <last>
+ (<force_last>). To stop this occurring, use <force_first> = <last>
+ 1 and <force_last> = <first> - 1.
<force_slash>
@@ -64,7 +64,7 @@
Treat any contained register (string) fields as constant when
determining the instruction field. For the instruction decode (and
- controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
+ controlled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
what would otherwize be non constant bits of an instruction.
<use_switch>
diff --git a/sim/ppc/powerpc.igen b/sim/ppc/powerpc.igen
index 60840fe..79b0d9b 100644
--- a/sim/ppc/powerpc.igen
+++ b/sim/ppc/powerpc.igen
@@ -3964,7 +3964,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
+ double product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4011,7 +4011,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
+ float product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4058,7 +4058,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
+ double product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4105,7 +4105,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
+ float product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4152,7 +4152,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
+ double product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4199,7 +4199,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
+ float product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4246,7 +4246,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
+ double product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
@@ -4293,7 +4293,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
+ float product; /*HACK! - incorrectly losing precision ... */
/* compute the multiply */
if (is_invalid_operation(processor, cia,
*frA, *frC,
diff --git a/sim/ppc/psim.c b/sim/ppc/psim.c
index 3b86b86..b2fff6a 100644
--- a/sim/ppc/psim.c
+++ b/sim/ppc/psim.c
@@ -445,7 +445,7 @@ psim_create(const char *file_name,
os_emulation = os_emul_create(file_name, root);
if (os_emulation == NULL)
- error("psim: either file %s was not reconized or unreconized or unknown os-emulation type\n", file_name);
+ error("psim: either file %s was not recognized or unreconized or unknown os-emulation type\n", file_name);
/* fill in the missing real number of CPU's */
nr_cpus = tree_find_integer_property(root, "/openprom/options/smp");
@@ -991,7 +991,7 @@ psim_write_register(psim *system,
processor = system->processors[which_cpu];
- /* If the data is comming in raw (target order), need to cook it
+ /* If the data is coming in raw (target order), need to cook it
into host order before putting it into PSIM's internal structures */
if (mode == raw_transfer) {
switch (description.size) {
diff --git a/sim/ppc/psim.texinfo b/sim/ppc/psim.texinfo
index b551387..6e30f53 100644
--- a/sim/ppc/psim.texinfo
+++ b/sim/ppc/psim.texinfo
@@ -147,7 +147,7 @@ This is Edition @value{edition} of the Texinfo documentation,
@end ifinfo
@c Here is a spare copy of the chapter menu entry descriptions,
-@c in case they are accidently deleted
+@c in case they are accidentally deleted
@ignore
Your rights.
Texinfo in brief.
@@ -927,7 +927,7 @@ contributed in their own unique way:
If PSIM doesn't monitor a components of interest,
the source code is freely available, and hence
- there is no hinderance to changing things
+ there is no hindrance to changing things
to meet a specific analysts needs.
diff --git a/sim/ppc/std-config.h b/sim/ppc/std-config.h
index de68cf2..d1cd981 100644
--- a/sim/ppc/std-config.h
+++ b/sim/ppc/std-config.h
@@ -106,7 +106,7 @@ extern enum bfd_endian current_target_byte_order;
expect to see (VEA includes things like coherency and the time
base) while OEA is what an operating system expects to see. By
setting these to specific values, the build process is able to
- eliminate non relevent environment code
+ eliminate non relevant environment code
CURRENT_ENVIRONMENT specifies which of vea or oea is required for
the current runtime. */
@@ -131,7 +131,7 @@ extern int current_environment;
/* Events. Devices modeling real H/W need to be able to efficiently
schedule things to do at known times in the future. The event
- queue implements this. Unfortunatly this adds the need to check
+ queue implements this. Unfortunately this adds the need to check
for any events once each full instruction cycle. */
#define WITH_EVENTS (WITH_ENVIRONMENT != USER_ENVIRONMENT)
@@ -284,7 +284,7 @@ extern int current_stdio;
speed improvement (x3-x5). In the case of RISC (sparc) while the
performance gain isn't as great it is still significant.
- Each module is controled by the macro <module>_INLINE which can
+ Each module is controlled by the macro <module>_INLINE which can
have the values described below
0 Do not inline any thing for the given module
@@ -384,7 +384,7 @@ extern int current_stdio;
Prefix to any declaration of a global object (function or
variable) that should not be inlined and should have only one
definition. The #ifndef wrapper goes around the definition
- propper to ensure that only one copy is generated.
+ proper to ensure that only one copy is generated.
nb: this will not work when a module is being inlined for every
use.
diff --git a/sim/ppc/tree.c b/sim/ppc/tree.c
index c2fe917..5ccb8ad 100644
--- a/sim/ppc/tree.c
+++ b/sim/ppc/tree.c
@@ -1217,7 +1217,7 @@ tree_find_device(device *root,
/* parse the path */
split_device_specifier(root, path_to_device, &spec);
if (spec.value != NULL)
- return NULL; /* something wierd */
+ return NULL; /* something weird */
/* now find it */
node = split_find_device(root, &spec);
diff --git a/sim/ppc/vm.c b/sim/ppc/vm.c
index b5ef758..3f82766 100644
--- a/sim/ppc/vm.c
+++ b/sim/ppc/vm.c
@@ -445,7 +445,7 @@ om_write_word(om_map *map,
}
-/* Bring things into existance */
+/* Bring things into existence */
INLINE_VM\
(vm *)
diff --git a/sim/ppc/vm.h b/sim/ppc/vm.h
index 63dc23c..2b6137a 100644
--- a/sim/ppc/vm.h
+++ b/sim/ppc/vm.h
@@ -60,7 +60,7 @@ INLINE_VM\
/* generic block transfers. Dependant on the presence of the
- PROCESSOR arg, either returns the number of bytes transfered or (if
+ PROCESSOR arg, either returns the number of bytes transferred or (if
PROCESSOR is non NULL) aborts the simulation */
INLINE_VM\
generated by cgit v1.1 at 2025-03-28 08:26:38 +0000