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-rw-r--r--sim/lm32/arch.c5
-rw-r--r--sim/lm32/arch.h13
-rw-r--r--sim/lm32/cpu.c5
-rw-r--r--sim/lm32/cpu.h9
-rw-r--r--sim/lm32/cpuall.h5
-rw-r--r--sim/lm32/decode.c13
-rw-r--r--sim/lm32/decode.h5
-rw-r--r--sim/lm32/model.c5
-rw-r--r--sim/lm32/sem-switch.c5
-rw-r--r--sim/lm32/sem.c5
10 files changed, 45 insertions, 25 deletions
diff --git a/sim/lm32/arch.c b/sim/lm32/arch.c
index 470075c..a3baafa 100644
--- a/sim/lm32/arch.c
+++ b/sim/lm32/arch.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
diff --git a/sim/lm32/arch.h b/sim/lm32/arch.h
index e31c81e..65a9dcf 100644
--- a/sim/lm32/arch.h
+++ b/sim/lm32/arch.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,13 +17,22 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
#ifndef LM32_ARCH_H
#define LM32_ARCH_H
+#define TARGET_BIG_ENDIAN 1
+
+#define WI SI
+#define UWI USI
+#define AI USI
+
+#define IAI USI
+
/* Enum declaration for model types. */
typedef enum model_type {
MODEL_LM32, MODEL_MAX
diff --git a/sim/lm32/cpu.c b/sim/lm32/cpu.c
index 29e4665..26a5681 100644
--- a/sim/lm32/cpu.c
+++ b/sim/lm32/cpu.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
diff --git a/sim/lm32/cpu.h b/sim/lm32/cpu.h
index 805f1eb..0192221 100644
--- a/sim/lm32/cpu.h
+++ b/sim/lm32/cpu.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
@@ -247,7 +248,7 @@ struct scache {
#define EXTRACT_IFMT_BI_CODE \
length = 4; \
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
- f_call = ((pc) + (((SI) (((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (6))) >> (4)))); \
+ f_call = ((pc) + (((((((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) & (67108863))) << (2))) ^ (134217728))) - (134217728)))); \
#define EXTRACT_IFMT_BE_VARS \
UINT f_opcode; \
@@ -260,7 +261,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
- f_branch = ((pc) + (((SI) (((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (16))) >> (14)))); \
+ f_branch = ((pc) + (((((((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) & (65535))) << (2))) ^ (131072))) - (131072)))); \
#define EXTRACT_IFMT_ORI_VARS \
UINT f_opcode; \
diff --git a/sim/lm32/cpuall.h b/sim/lm32/cpuall.h
index e6d5a19..801c5cf 100644
--- a/sim/lm32/cpuall.h
+++ b/sim/lm32/cpuall.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
diff --git a/sim/lm32/decode.c b/sim/lm32/decode.c
index 8107074..826fd58 100644
--- a/sim/lm32/decode.c
+++ b/sim/lm32/decode.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
@@ -26,6 +27,8 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "sim-assert.h"
+#include "cgen-mem.h"
+#include "cgen-ops.h"
/* The instruction descriptor array.
This is computed at runtime. Space for it is not malloc'd to save a
@@ -474,7 +477,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bi.f
SI f_call;
- f_call = ((pc) + (((SI) (((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (6))) >> (4))));
+ f_call = ((pc) + (((((((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) & (67108863))) << (2))) ^ (134217728))) - (134217728))));
/* Record the fields for the semantic handler. */
FLD (i_call) = f_call;
@@ -495,7 +498,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
- f_branch = ((pc) + (((SI) (((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (16))) >> (14))));
+ f_branch = ((pc) + (((((((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) & (65535))) << (2))) ^ (131072))) - (131072))));
/* Record the fields for the semantic handler. */
FLD (f_r0) = f_r0;
@@ -531,7 +534,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bi.f
SI f_call;
- f_call = ((pc) + (((SI) (((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (6))) >> (4))));
+ f_call = ((pc) + (((((((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) & (67108863))) << (2))) ^ (134217728))) - (134217728))));
/* Record the fields for the semantic handler. */
FLD (i_call) = f_call;
diff --git a/sim/lm32/decode.h b/sim/lm32/decode.h
index e1de196..139b03b 100644
--- a/sim/lm32/decode.h
+++ b/sim/lm32/decode.h
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
diff --git a/sim/lm32/model.c b/sim/lm32/model.c
index 60d223a..0bc1650 100644
--- a/sim/lm32/model.c
+++ b/sim/lm32/model.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
diff --git a/sim/lm32/sem-switch.c b/sim/lm32/sem-switch.c
index 8a13d04..972f7af 100644
--- a/sim/lm32/sem-switch.c
+++ b/sim/lm32/sem-switch.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
diff --git a/sim/lm32/sem.c b/sim/lm32/sem.c
index 02fc5f2..5b630c3 100644
--- a/sim/lm32/sem.c
+++ b/sim/lm32/sem.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2023 Free Software Foundation, Inc.
+Copyright (C) 1996-2023 Free Software Foundation, Inc.
This file is part of the GNU simulators.
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, see <http://www.gnu.org/licenses/>.
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
generated by cgit v1.1 at 2025-08-09 05:56:05 +0000