diff options
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 15c6635..6eadc2e 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -44,7 +44,7 @@ #define InOutPortReg RegD|Word #define FloatAcc Acc|Tbyte -#define FloatReg Class=Reg|Tbyte +#define FloatReg Class=RegFP|Tbyte #define SReg Class=SReg @@ -275,7 +275,9 @@ in, 0xe4, 0, W|No_sSuf|No_qSuf, { Imm8, Acc|Byte|Word|Dword } in, 0xec, 0, W|No_sSuf|No_qSuf, { InOutPortReg, Acc|Byte|Word|Dword } in, 0xe4, 0, W|No_sSuf|No_qSuf|IntelSuffix, { Imm8 } in, 0xec, 0, W|No_sSuf|No_qSuf|IntelSuffix, { InOutPortReg } -out, 0xe6, 0, W|No_sSuf|No_qSuf, { Acc|Byte|Word|Dword, Imm8 } +// Immediates want to be first; md_assemble() takes care of swapping operands +// accordingly. +out, 0xe6, 0, W|No_sSuf|No_qSuf, { Imm8, Acc|Byte|Word|Dword } out, 0xee, 0, W|No_sSuf|No_qSuf, { Acc|Byte|Word|Dword, InOutPortReg } out, 0xe6, 0, W|No_sSuf|No_qSuf|IntelSuffix, { Imm8 } out, 0xee, 0, W|No_sSuf|No_qSuf|IntelSuffix, { InOutPortReg } @@ -947,7 +949,7 @@ rex.wrxb, 0x4f, x64, NoSuf|IsPrefix, {} load:Load:0, store:Store:0, + vex:VEX:0, vex2:VEX:0, vex3:VEX3:0, evex:EVEX:0, + rex:REX:x64, rex2:REX2:APX_F, nf:NF:APX_F, + - nooptimize:NoOptimize:0> + nooptimize:NoOptimize:0, noimm8s:NoImm8s:0> {<pseudopfx>}, PSEUDO_PREFIX/Prefix_<pseudopfx:ident>, <pseudopfx:cpu>, NoSuf|IsPrefix, {} @@ -979,15 +981,18 @@ fxrstor, 0xfae/1, FXSR, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|IntelSuffix, { Uns fxrstor64, 0xfae/1, FXSR&x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex } rdpmc, 0xf33, i686, NoSuf, {} // official undefined instr. -ud2, 0xf0b, i186, NoSuf, {} +ud2, 0xf0b, i286, NoSuf, {} // alias for ud2 -ud2a, 0xf0b, i186, NoSuf, {} -// 2nd. official undefined instr. -ud1, 0xfb9, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +ud2a, 0xf0b, i286, NoSuf, {} +// 2nd official undefined instr (older AMD CPUs don't take a ModR/M byte) +ud1, 0xfb9, i286, /*Amd|*/NoSuf, {} +ud1, 0xfb9, i286, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // alias for ud1 -ud2b, 0xfb9, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +ud2b, 0xfb9, i286, /*Amd|*/NoSuf, {} +ud2b, 0xfb9, i286, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // 3rd official undefined instr (older CPUs don't take a ModR/M byte) -ud0, 0xfff, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +ud0, 0xfff, i286, NoSuf, {} +ud0, 0xfff, i286, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // C (commutative) isn't quite correct here on its own; the condition also // needs inverting when source operands are swapped in order to convert to |