diff options
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 68 |
1 files changed, 46 insertions, 22 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 4de7965..f7dae4b 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -814,7 +814,7 @@ struct operand_qualifier_data }; /* Indexed by the operand qualifier enumerators. */ -struct operand_qualifier_data aarch64_opnd_qualifiers[] = +static const struct operand_qualifier_data aarch64_opnd_qualifiers[] = { {0, 0, 0, "NIL", OQK_NIL}, @@ -4024,28 +4024,41 @@ static void print_sme_za_list (char *buf, size_t size, int mask, struct aarch64_styler *styler) { - const char* zan[] = { "za", "za0.h", "za1.h", "za0.s", - "za1.s", "za2.s", "za3.s", "za0.d", - "za1.d", "za2.d", "za3.d", "za4.d", - "za5.d", "za6.d", "za7.d", " " }; - const int zan_v[] = { 0xff, 0x55, 0xaa, 0x11, - 0x22, 0x44, 0x88, 0x01, - 0x02, 0x04, 0x08, 0x10, - 0x20, 0x40, 0x80, 0x00 }; - int i, k; - const int ZAN_SIZE = sizeof(zan) / sizeof(zan[0]); + static const struct { + unsigned char mask; + char name[7]; + } zan[] = { + { 0xff, "za" }, + { 0x55, "za0.h" }, + { 0xaa, "za1.h" }, + { 0x11, "za0.s" }, + { 0x22, "za1.s" }, + { 0x44, "za2.s" }, + { 0x88, "za3.s" }, + { 0x01, "za0.d" }, + { 0x02, "za1.d" }, + { 0x04, "za2.d" }, + { 0x08, "za3.d" }, + { 0x10, "za4.d" }, + { 0x20, "za5.d" }, + { 0x40, "za6.d" }, + { 0x80, "za7.d" }, + { 0x00, " " }, + }; + int k; k = snprintf (buf, size, "{"); - for (i = 0; i < ZAN_SIZE; i++) + for (unsigned int i = 0; i < ARRAY_SIZE (zan); i++) { - if ((mask & zan_v[i]) == zan_v[i]) - { - mask &= ~zan_v[i]; - if (k > 1) + if ((mask & zan[i].mask) == zan[i].mask) + { + mask &= ~zan[i].mask; + if (k > 1) k += snprintf (buf + k, size - k, ", "); - k += snprintf (buf + k, size - k, "%s", style_reg (styler, zan[i])); - } + k += snprintf (buf + k, size - k, "%s", + style_reg (styler, zan[i].name)); + } if (mask == 0) break; } @@ -5720,10 +5733,21 @@ verify_constraints (const struct aarch64_inst *inst, { /* Check to see if the MOVPRFX SVE instruction is followed by an SVE instruction for better error messages. */ - if (!opcode->avariant - || (!AARCH64_CPU_HAS_FEATURE (*opcode->avariant, SVE) - && !AARCH64_CPU_HAS_FEATURE (*opcode->avariant, SVE2) - && !AARCH64_CPU_HAS_FEATURE (*opcode->avariant, SVE2p1))) + bool sve_operand_p = false; + for (int i = 0; i < AARCH64_MAX_OPND_NUM; ++i) + { + enum aarch64_operand_class op_class + = aarch64_get_operand_class (opcode->operands[i]); + if (op_class == AARCH64_OPND_CLASS_SVE_REG + || op_class == AARCH64_OPND_CLASS_SVE_REGLIST + || op_class == AARCH64_OPND_CLASS_PRED_REG) + { + sve_operand_p = true; + break; + } + } + + if (!sve_operand_p) { mismatch_detail->kind = AARCH64_OPDE_SYNTAX_ERROR; mismatch_detail->error = _("SVE instruction expected after " |