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-rw-r--r--gdb/arch/aarch32.c2
-rw-r--r--gdb/arch/aarch32.h2
-rw-r--r--gdb/arch/aarch64-gcs-linux.h44
-rw-r--r--gdb/arch/aarch64-insn.c2
-rw-r--r--gdb/arch/aarch64-insn.h2
-rw-r--r--gdb/arch/aarch64-mte-linux.c2
-rw-r--r--gdb/arch/aarch64-mte-linux.h2
-rw-r--r--gdb/arch/aarch64-mte.c2
-rw-r--r--gdb/arch/aarch64-mte.h2
-rw-r--r--gdb/arch/aarch64-scalable-linux.c2
-rw-r--r--gdb/arch/aarch64-scalable-linux.h2
-rw-r--r--gdb/arch/aarch64.c10
-rw-r--r--gdb/arch/aarch64.h12
-rw-r--r--gdb/arch/amd64-linux-tdesc.c33
-rw-r--r--gdb/arch/amd64-linux-tdesc.h9
-rw-r--r--gdb/arch/amd64.c27
-rw-r--r--gdb/arch/amd64.h12
-rw-r--r--gdb/arch/arc.c3
-rw-r--r--gdb/arch/arc.h2
-rw-r--r--gdb/arch/arm-get-next-pcs.c143
-rw-r--r--gdb/arch/arm-get-next-pcs.h2
-rw-r--r--gdb/arch/arm-linux.c2
-rw-r--r--gdb/arch/arm-linux.h2
-rw-r--r--gdb/arch/arm.c4
-rw-r--r--gdb/arch/arm.h19
-rw-r--r--gdb/arch/csky.c2
-rw-r--r--gdb/arch/csky.h2
-rw-r--r--gdb/arch/i386-linux-tdesc.c31
-rw-r--r--gdb/arch/i386-linux-tdesc.h7
-rw-r--r--gdb/arch/i386.c21
-rw-r--r--gdb/arch/i386.h9
-rw-r--r--gdb/arch/loongarch-insn.h2
-rw-r--r--gdb/arch/loongarch-syscall.h2
-rw-r--r--gdb/arch/loongarch.c3
-rw-r--r--gdb/arch/loongarch.h2
-rw-r--r--gdb/arch/ppc-linux-common.c2
-rw-r--r--gdb/arch/ppc-linux-common.h2
-rw-r--r--gdb/arch/ppc-linux-tdesc.h2
-rw-r--r--gdb/arch/riscv.c3
-rw-r--r--gdb/arch/riscv.h2
-rw-r--r--gdb/arch/tic6x.c2
-rw-r--r--gdb/arch/tic6x.h2
-rw-r--r--gdb/arch/x86-linux-tdesc-features.c62
-rw-r--r--gdb/arch/x86-linux-tdesc-features.h29
-rw-r--r--gdb/arch/x86-linux-tdesc.h2
-rw-r--r--gdb/arch/xtensa.h2
46 files changed, 372 insertions, 163 deletions
diff --git a/gdb/arch/aarch32.c b/gdb/arch/aarch32.c
index ead368f..9ae69fd 100644
--- a/gdb/arch/aarch32.c
+++ b/gdb/arch/aarch32.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2019-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2019-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch32.h b/gdb/arch/aarch32.h
index f3e70af..7dd43f8 100644
--- a/gdb/arch/aarch32.h
+++ b/gdb/arch/aarch32.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2019-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2019-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-gcs-linux.h b/gdb/arch/aarch64-gcs-linux.h
new file mode 100644
index 0000000..922c779
--- /dev/null
+++ b/gdb/arch/aarch64-gcs-linux.h
@@ -0,0 +1,44 @@
+/* Common Linux target-dependent definitions for AArch64 GCS
+
+ Copyright (C) 2025 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#ifndef GDB_ARCH_AARCH64_GCS_LINUX_H
+#define GDB_ARCH_AARCH64_GCS_LINUX_H
+
+#include <stdint.h>
+
+/* Feature check for Guarded Control Stack. */
+#ifndef HWCAP_GCS
+#define HWCAP_GCS (1UL << 32)
+#endif
+
+/* Make sure we only define these if the kernel header doesn't. */
+#ifndef GCS_MAGIC
+
+/* GCS state (NT_ARM_GCS). */
+
+struct user_gcs
+{
+ uint64_t features_enabled;
+ uint64_t features_locked;
+ uint64_t gcspr_el0;
+};
+
+#endif /* GCS_MAGIC */
+
+#endif /* GDB_ARCH_AARCH64_GCS_LINUX_H */
diff --git a/gdb/arch/aarch64-insn.c b/gdb/arch/aarch64-insn.c
index 3caef45..4be15ab 100644
--- a/gdb/arch/aarch64-insn.c
+++ b/gdb/arch/aarch64-insn.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2009-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2009-2025 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-insn.h b/gdb/arch/aarch64-insn.h
index bd3a85f..f2b9d9c 100644
--- a/gdb/arch/aarch64-insn.h
+++ b/gdb/arch/aarch64-insn.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2009-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2009-2025 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-mte-linux.c b/gdb/arch/aarch64-mte-linux.c
index 49426d7..9f433b0 100644
--- a/gdb/arch/aarch64-mte-linux.c
+++ b/gdb/arch/aarch64-mte-linux.c
@@ -1,6 +1,6 @@
/* Common Linux target-dependent functionality for AArch64 MTE
- Copyright (C) 2021-2024 Free Software Foundation, Inc.
+ Copyright (C) 2021-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-mte-linux.h b/gdb/arch/aarch64-mte-linux.h
index f933729..a4f55c5 100644
--- a/gdb/arch/aarch64-mte-linux.h
+++ b/gdb/arch/aarch64-mte-linux.h
@@ -1,6 +1,6 @@
/* Common Linux target-dependent definitions for AArch64 MTE
- Copyright (C) 2021-2024 Free Software Foundation, Inc.
+ Copyright (C) 2021-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-mte.c b/gdb/arch/aarch64-mte.c
index 908e12c..3fd0b61 100644
--- a/gdb/arch/aarch64-mte.c
+++ b/gdb/arch/aarch64-mte.c
@@ -1,6 +1,6 @@
/* Common AArch64 functionality for MTE
- Copyright (C) 2021-2024 Free Software Foundation, Inc.
+ Copyright (C) 2021-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-mte.h b/gdb/arch/aarch64-mte.h
index 0b4f4a3..ec495f0 100644
--- a/gdb/arch/aarch64-mte.h
+++ b/gdb/arch/aarch64-mte.h
@@ -1,6 +1,6 @@
/* Common AArch64 definitions for MTE
- Copyright (C) 2021-2024 Free Software Foundation, Inc.
+ Copyright (C) 2021-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-scalable-linux.c b/gdb/arch/aarch64-scalable-linux.c
index 485d77e..110acf0 100644
--- a/gdb/arch/aarch64-scalable-linux.c
+++ b/gdb/arch/aarch64-scalable-linux.c
@@ -1,7 +1,7 @@
/* Common Linux arch-specific functionality for AArch64 scalable
extensions: SVE and SME.
- Copyright (C) 2023-2024 Free Software Foundation, Inc.
+ Copyright (C) 2023-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64-scalable-linux.h b/gdb/arch/aarch64-scalable-linux.h
index 886f4a2..a4bfcd8 100644
--- a/gdb/arch/aarch64-scalable-linux.h
+++ b/gdb/arch/aarch64-scalable-linux.h
@@ -1,7 +1,7 @@
/* Common AArch64 Linux arch-specific definitions for the scalable
extensions: SVE and SME.
- Copyright (C) 2023-2024 Free Software Foundation, Inc.
+ Copyright (C) 2023-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/aarch64.c b/gdb/arch/aarch64.c
index 5526aa1..dff2bc1 100644
--- a/gdb/arch/aarch64.c
+++ b/gdb/arch/aarch64.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -26,6 +26,8 @@
#include "../features/aarch64-sme.c"
#include "../features/aarch64-sme2.c"
#include "../features/aarch64-tls.c"
+#include "../features/aarch64-gcs.c"
+#include "../features/aarch64-gcs-linux.c"
/* See arch/aarch64.h. */
@@ -65,6 +67,12 @@ aarch64_create_target_description (const aarch64_features &features)
if (features.sme2)
regnum = create_feature_aarch64_sme2 (tdesc.get (), regnum);
+ if (features.gcs)
+ regnum = create_feature_aarch64_gcs (tdesc.get (), regnum);
+
+ if (features.gcs_linux)
+ regnum = create_feature_aarch64_gcs_linux (tdesc.get (), regnum);
+
return tdesc.release ();
}
diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h
index f45a0e2..679d845 100644
--- a/gdb/arch/aarch64.h
+++ b/gdb/arch/aarch64.h
@@ -1,6 +1,6 @@
/* Common target-dependent functionality for AArch64.
- Copyright (C) 2017-2024 Free Software Foundation, Inc.
+ Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -51,6 +51,12 @@ struct aarch64_features
/* Whether SME2 is supported. */
bool sme2 = false;
+
+ /* Whether Guarded Control Stack is supported. */
+ bool gcs = false;
+
+ /* Whether Guarded Control Stack Linux features are supported. */
+ bool gcs_linux = false;
};
inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
@@ -60,7 +66,9 @@ inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
&& lhs.mte == rhs.mte
&& lhs.tls == rhs.tls
&& lhs.svq == rhs.svq
- && lhs.sme2 == rhs.sme2;
+ && lhs.sme2 == rhs.sme2
+ && lhs.gcs == rhs.gcs
+ && lhs.gcs_linux == rhs.gcs_linux;
}
namespace std
diff --git a/gdb/arch/amd64-linux-tdesc.c b/gdb/arch/amd64-linux-tdesc.c
index e9c4a99..8796662 100644
--- a/gdb/arch/amd64-linux-tdesc.c
+++ b/gdb/arch/amd64-linux-tdesc.c
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux x86-64.
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -26,34 +26,35 @@
/* See arch/amd64-linux-tdesc.h. */
const struct target_desc *
-amd64_linux_read_description (uint64_t xcr0, bool is_x32)
+amd64_linux_read_description (uint64_t xstate_bv, bool is_x32)
{
/* The type used for the amd64 and x32 target description caches. */
using tdesc_cache_type = std::unordered_map<uint64_t, const target_desc_up>;
/* Caches for the previously seen amd64 and x32 target descriptions,
- indexed by the xcr0 value that created the target description. These
- need to be static within this function to ensure they are initialised
- before first use. */
+ indexed by the xstate_bv value that created the target
+ description. These need to be static within this function to ensure
+ they are initialised before first use. */
static tdesc_cache_type amd64_tdesc_cache, x32_tdesc_cache;
tdesc_cache_type &tdesc_cache = is_x32 ? x32_tdesc_cache : amd64_tdesc_cache;
- /* Only some bits are checked when creating a tdesc, but the XCR0 value
- contains other feature bits that are not relevant for tdesc creation.
- When indexing into the TDESC_CACHE we need to use a consistent xcr0
- value otherwise we might fail to find an existing tdesc which has the
- same set of relevant bits set. */
- xcr0 &= is_x32
- ? x86_linux_x32_xcr0_feature_mask ()
- : x86_linux_amd64_xcr0_feature_mask ();
+ /* Only some bits are checked when creating a tdesc, but the
+ xstate_bv value contains other feature bits that are not
+ relevant for tdesc creation.
+ When indexing into the TDESC_CACHE we need to use a consistent
+ xstate_bv value otherwise we might fail to find an existing
+ tdesc which has the same set of relevant bits set. */
+ xstate_bv &= is_x32
+ ? x86_linux_x32_xstate_bv_feature_mask ()
+ : x86_linux_amd64_xstate_bv_feature_mask ();
- const auto it = tdesc_cache.find (xcr0);
+ const auto it = tdesc_cache.find (xstate_bv);
if (it != tdesc_cache.end ())
return it->second.get ();
/* Create the previously unseen target description. */
- target_desc_up tdesc (amd64_create_target_description (xcr0, is_x32,
+ target_desc_up tdesc (amd64_create_target_description (xstate_bv, is_x32,
true, true));
x86_linux_post_init_tdesc (tdesc.get (), true);
@@ -61,6 +62,6 @@ amd64_linux_read_description (uint64_t xcr0, bool is_x32)
target_desc_up. This is safe as the cache (and the pointers contained
within it) are not deleted until GDB exits. */
target_desc *ptr = tdesc.get ();
- tdesc_cache.emplace (xcr0, std::move (tdesc));
+ tdesc_cache.emplace (xstate_bv, std::move (tdesc));
return ptr;
}
diff --git a/gdb/arch/amd64-linux-tdesc.h b/gdb/arch/amd64-linux-tdesc.h
index f6a4248..4c0c591 100644
--- a/gdb/arch/amd64-linux-tdesc.h
+++ b/gdb/arch/amd64-linux-tdesc.h
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux x86-64.
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -22,9 +22,10 @@
struct target_desc;
-/* Return the AMD64 target descriptions corresponding to XCR0 and IS_X32. */
+/* Return the AMD64 target descriptions corresponding to XSTATE_BV and
+ IS_X32. */
-extern const target_desc *amd64_linux_read_description (uint64_t xcr0,
- bool is_x32);
+extern const target_desc *amd64_linux_read_description
+ (uint64_t xstate_bv, bool is_x32);
#endif /* GDB_ARCH_AMD64_LINUX_TDESC_H */
diff --git a/gdb/arch/amd64.c b/gdb/arch/amd64.c
index 5fc9947..9fbe802 100644
--- a/gdb/arch/amd64.c
+++ b/gdb/arch/amd64.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -28,16 +28,15 @@
#include "../features/i386/64bit-sse.c"
#include "../features/i386/pkeys.c"
+#include "../features/i386/64bit-ssp.c"
+#include "../features/i386/32bit-ssp.c"
#include "../features/i386/x32-core.c"
-/* Create amd64 target descriptions according to XCR0. If IS_X32 is
- true, create the x32 ones. If IS_LINUX is true, create target
- descriptions for Linux. If SEGMENTS is true, then include
- the "org.gnu.gdb.i386.segments" feature registers. */
+/* See arch/amd64.h. */
target_desc *
-amd64_create_target_description (uint64_t xcr0, bool is_x32, bool is_linux,
- bool segments)
+amd64_create_target_description (uint64_t xstate_bv, bool is_x32,
+ bool is_linux, bool segments)
{
target_desc_up tdesc = allocate_target_description ();
@@ -62,14 +61,22 @@ amd64_create_target_description (uint64_t xcr0, bool is_x32, bool is_linux,
if (segments)
regnum = create_feature_i386_64bit_segments (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_AVX)
+ if (xstate_bv & X86_XSTATE_AVX)
regnum = create_feature_i386_64bit_avx (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_AVX512)
+ if (xstate_bv & X86_XSTATE_AVX512)
regnum = create_feature_i386_64bit_avx512 (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_PKRU)
+ if (xstate_bv & X86_XSTATE_PKRU)
regnum = create_feature_i386_pkeys (tdesc.get (), regnum);
+ if (xstate_bv & X86_XSTATE_CET_U)
+ {
+ if (!is_x32)
+ regnum = create_feature_i386_64bit_ssp (tdesc.get (), regnum);
+ else
+ regnum = create_feature_i386_32bit_ssp (tdesc.get (), regnum);
+ }
+
return tdesc.release ();
}
diff --git a/gdb/arch/amd64.h b/gdb/arch/amd64.h
index 1c7a2bb..60c17eb 100644
--- a/gdb/arch/amd64.h
+++ b/gdb/arch/amd64.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -21,7 +21,13 @@
#include "gdbsupport/tdesc.h"
#include <stdint.h>
-target_desc *amd64_create_target_description (uint64_t xcr0, bool is_x32,
- bool is_linux, bool segments);
+/* Create amd64 target descriptions according to XSTATE_BV. If
+ IS_X32 is true, create the x32 ones. If IS_LINUX is true, create
+ target descriptions for Linux. If SEGMENTS is true, then include
+ the "org.gnu.gdb.i386.segments" feature registers. */
+
+target_desc *amd64_create_target_description (uint64_t xstate_bv,
+ bool is_x32, bool is_linux,
+ bool segments);
#endif /* GDB_ARCH_AMD64_H */
diff --git a/gdb/arch/arc.c b/gdb/arch/arc.c
index e807b60..b7de1da 100644
--- a/gdb/arch/arc.c
+++ b/gdb/arch/arc.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -17,7 +17,6 @@
#include "arc.h"
-#include <stdlib.h>
#include <unordered_map>
#include <string>
diff --git a/gdb/arch/arc.h b/gdb/arch/arc.h
index 887431e..f0dbbb8 100644
--- a/gdb/arch/arc.h
+++ b/gdb/arch/arc.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/arm-get-next-pcs.c b/gdb/arch/arm-get-next-pcs.c
index 6c18236..82b077c 100644
--- a/gdb/arch/arm-get-next-pcs.c
+++ b/gdb/arch/arm-get-next-pcs.c
@@ -1,6 +1,6 @@
/* Common code for ARM software single stepping support.
- Copyright (C) 1988-2024 Free Software Foundation, Inc.
+ Copyright (C) 1988-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -39,10 +39,92 @@ arm_get_next_pcs_ctor (struct arm_get_next_pcs *self,
self->regcache = regcache;
}
-/* Checks for an atomic sequence of instructions beginning with a LDREX{,B,H,D}
- instruction and ending with a STREX{,B,H,D} instruction. If such a sequence
- is found, attempt to step through it. The end of the sequence address is
- added to the next_pcs list. */
+/* Return true if INSN matches one of the <value,mask> pairs in MATCHES. */
+
+static bool
+insn_matches (uint32_t insn, gdb::array_view<const uint32_t> matches)
+{
+ gdb_assert (matches.size () % 2 == 0);
+
+ for (int i = 0; i < matches.size (); i += 2)
+ {
+ uint32_t value = matches[i];
+ uint32_t mask = matches[i + 1];
+ if ((insn & mask) == value)
+ return true;
+ }
+
+ return false;
+}
+
+/* Return true if INSN is an ldaex arm insn. */
+
+static bool
+ldaex_arm_p (uint32_t insn)
+{
+ /* Copied from arm_opcodes in opcodes/arm-dis.c. */
+ const uint32_t matches_ldaex_arm[] = {
+ 0x01900e9f, 0x0ff00fff, /* ldaex. */
+ 0x01b00e9f, 0x0ff00fff, /* ldaexd. */
+ 0x01d00e9f, 0x0ff00fff, /* ldaexb. */
+ 0x01f00e9f, 0x0ff00fff /* ldaexh. */
+ };
+
+ return insn_matches (insn, matches_ldaex_arm);
+}
+
+/* Return true if INSN is an ldaex thumb32 insn. */
+
+static bool
+ldaex_thumb32_p (uint32_t insn)
+{
+ /* Copied from thumb32_opcodes in opcodes/arm-dis.c. */
+ const uint32_t matches_ldaex_thumb32[] = {
+ 0xe8d00fcf, 0xfff00fff, /* ldaexb. */
+ 0xe8d00fdf, 0xfff00fff, /* ldaexh. */
+ 0xe8d00fef, 0xfff00fff, /* ldaex. */
+ 0xe8d000ff, 0xfff000ff /* ldaexd. */
+ };
+
+ return insn_matches (insn, matches_ldaex_thumb32);
+}
+
+/* Return true if INSN is an stlex arm insn. */
+
+static bool
+stlex_arm_p (uint32_t insn)
+{
+ /* Copied from arm_opcodes in opcodes/arm-dis.c. */
+ const uint32_t matches_stlex_arm[] = {
+ 0x01800e90, 0x0ff00ff0, /* stlex. */
+ 0x01a00e90, 0x0ff00ff0, /* stlexd. */
+ 0x01c00e90, 0x0ff00ff0, /* stlexb. */
+ 0x01e00e90, 0x0ff00ff0, /* stlexh. */
+ };
+
+ return insn_matches (insn, matches_stlex_arm);
+}
+
+/* Return true if INSN is an stlex thumb32 insn. */
+
+static bool
+stlex_thumb32_p (uint32_t insn)
+{
+ /* Copied from thumb32_opcodes in opcodes/arm-dis.c. */
+ const uint32_t matches_stlex_thumb32[] = {
+ 0xe8c00fc0, 0xfff00ff0, /* stlexb. */
+ 0xe8c00fd0, 0xfff00ff0, /* stlexh. */
+ 0xe8c00fe0, 0xfff00ff0, /* stlex. */
+ 0xe8c000f0, 0xfff000f0, /* stlexd. */
+ };
+
+ return insn_matches (insn, matches_stlex_thumb32);
+}
+
+/* Checks for an atomic sequence of instructions beginning with an
+ LD[AR]EX{,B,H,D} instruction and ending with a ST[LR]EX{,B,H,D} instruction.
+ If such a sequence is found, attempt to step through it. The end of the
+ sequence address is added to the next_pcs list. */
static std::vector<CORE_ADDR>
thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
@@ -64,18 +146,22 @@ thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
if (itstate & 0x0f)
return {};
- /* Assume all atomic sequences start with a ldrex{,b,h,d} instruction. */
insn1 = self->ops->read_mem_uint (loc, 2, byte_order_for_code);
-
loc += 2;
+
if (thumb_insn_size (insn1) != 4)
return {};
insn2 = self->ops->read_mem_uint (loc, 2, byte_order_for_code);
-
loc += 2;
+
+ uint32_t insn = (uint32_t)insn2 | ((uint32_t)insn1 << 16);
+
+ /* Assume all atomic sequences start with an ld[ar]ex{,b,h,d}
+ instruction. */
if (!((insn1 & 0xfff0) == 0xe850
- || ((insn1 & 0xfff0) == 0xe8d0 && (insn2 & 0x00c0) == 0x0040)))
+ || ((insn1 & 0xfff0) == 0xe8d0 && (insn2 & 0x00c0) == 0x0040)
+ || ldaex_thumb32_p (insn)))
return {};
/* Assume that no atomic sequence is longer than "atomic_sequence_length"
@@ -110,9 +196,10 @@ thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
else
{
insn2 = self->ops->read_mem_uint (loc, 2, byte_order_for_code);
-
loc += 2;
+ insn = (uint32_t)insn2 | ((uint32_t)insn1 << 16);
+
/* Assume that there is at most one conditional branch in the
atomic sequence. If a conditional branch is found, put a
breakpoint in its destination address. */
@@ -147,9 +234,10 @@ thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
else if (thumb2_instruction_changes_pc (insn1, insn2))
return {};
- /* If we find a strex{,b,h,d}, we're done. */
+ /* If we find a st[lr]ex{,b,h,d}, we're done. */
if ((insn1 & 0xfff0) == 0xe840
- || ((insn1 & 0xfff0) == 0xe8c0 && (insn2 & 0x00c0) == 0x0040))
+ || ((insn1 & 0xfff0) == 0xe8c0 && (insn2 & 0x00c0) == 0x0040)
+ || stlex_thumb32_p (insn))
break;
}
}
@@ -177,10 +265,10 @@ thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
return next_pcs;
}
-/* Checks for an atomic sequence of instructions beginning with a LDREX{,B,H,D}
- instruction and ending with a STREX{,B,H,D} instruction. If such a sequence
- is found, attempt to step through it. The end of the sequence address is
- added to the next_pcs list. */
+/* Checks for an atomic sequence of instructions beginning with an
+ LD[AR]EX{,B,H,D} instruction and ending with a ST[LR]EX{,B,H,D} instruction.
+ If such a sequence is found, attempt to step through it. The end of the
+ sequence address is added to the next_pcs list. */
static std::vector<CORE_ADDR>
arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
@@ -195,13 +283,16 @@ arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
const int atomic_sequence_length = 16; /* Instruction sequence length. */
- /* Assume all atomic sequences start with a ldrex{,b,h,d} instruction.
- Note that we do not currently support conditionally executed atomic
- instructions. */
insn = self->ops->read_mem_uint (loc, 4, byte_order_for_code);
-
loc += 4;
- if ((insn & 0xff9000f0) != 0xe1900090)
+
+ /* Currently we do not support conditionally executed atomic instructions. */
+ if (!insn_condition_always_true (insn))
+ return {};
+
+ /* Assume all atomic sequences start with an ld[ar]ex{,b,h,d} instruction. */
+ if (!((insn & 0x0f9000f0) == 0x01900090
+ || ldaex_arm_p (insn)))
return {};
/* Assume that no atomic sequence is longer than "atomic_sequence_length"
@@ -231,8 +322,14 @@ arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
else if (arm_instruction_changes_pc (insn))
return {};
- /* If we find a strex{,b,h,d}, we're done. */
- if ((insn & 0xff9000f0) == 0xe1800090)
+ /* Currently we do not support conditionally executed atomic
+ instructions. */
+ if (!insn_condition_always_true (insn))
+ return {};
+
+ /* If we find a st[lr]ex{,b,h,d}, we're done. */
+ if ((insn & 0x0f9000f0) == 0x01800090
+ || stlex_arm_p (insn))
break;
}
diff --git a/gdb/arch/arm-get-next-pcs.h b/gdb/arch/arm-get-next-pcs.h
index 7680373..e6ecbe9 100644
--- a/gdb/arch/arm-get-next-pcs.h
+++ b/gdb/arch/arm-get-next-pcs.h
@@ -1,6 +1,6 @@
/* Common code for ARM software single stepping support.
- Copyright (C) 1988-2024 Free Software Foundation, Inc.
+ Copyright (C) 1988-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/arm-linux.c b/gdb/arch/arm-linux.c
index 246bade..18918ec 100644
--- a/gdb/arch/arm-linux.c
+++ b/gdb/arch/arm-linux.c
@@ -1,6 +1,6 @@
/* Common target dependent code for GNU/Linux on ARM systems.
- Copyright (C) 1999-2024 Free Software Foundation, Inc.
+ Copyright (C) 1999-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/arm-linux.h b/gdb/arch/arm-linux.h
index 39c73c3..db8193b 100644
--- a/gdb/arch/arm-linux.h
+++ b/gdb/arch/arm-linux.h
@@ -1,6 +1,6 @@
/* Common target dependent code for GNU/Linux on ARM systems.
- Copyright (C) 1999-2024 Free Software Foundation, Inc.
+ Copyright (C) 1999-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/arm.c b/gdb/arch/arm.c
index f1c292b..1843dbe 100644
--- a/gdb/arch/arm.c
+++ b/gdb/arch/arm.c
@@ -1,6 +1,6 @@
/* Common target dependent code for GDB on ARM systems.
- Copyright (C) 1988-2024 Free Software Foundation, Inc.
+ Copyright (C) 1988-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -46,7 +46,7 @@ thumb_insn_size (unsigned short inst1)
int
condition_true (unsigned long cond, unsigned long status_reg)
{
- if (cond == INST_AL || cond == INST_NV)
+ if (condition_always_true (cond))
return 1;
switch (cond)
diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h
index 7738d9c..d9c7503 100644
--- a/gdb/arch/arm.h
+++ b/gdb/arch/arm.h
@@ -1,5 +1,5 @@
/* Common target dependent code for GDB on ARM systems.
- Copyright (C) 1988-2024 Free Software Foundation, Inc.
+ Copyright (C) 1988-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -194,6 +194,23 @@ struct reg_buffer_common;
first halfword is INST1. */
int thumb_insn_size (unsigned short inst1);
+/* Returns true if COND always evaluates to true. */
+
+static inline bool
+condition_always_true (unsigned long cond)
+{
+ return cond == INST_AL || cond == INST_NV;
+}
+
+/* Returns true if cond of INSN always evaluates to true. */
+
+static inline bool
+insn_condition_always_true (uint32_t insn)
+{
+ unsigned long cond = bits (insn, 28, 31);
+ return condition_always_true (cond);
+}
+
/* Returns true if the condition evaluates to true. */
int condition_true (unsigned long cond, unsigned long status_reg);
diff --git a/gdb/arch/csky.c b/gdb/arch/csky.c
index 32df2ad..64ead0d 100644
--- a/gdb/arch/csky.c
+++ b/gdb/arch/csky.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2022-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2022-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/csky.h b/gdb/arch/csky.h
index 67b2f17..9bcb554b 100644
--- a/gdb/arch/csky.h
+++ b/gdb/arch/csky.h
@@ -1,6 +1,6 @@
/* Common target-dependent functionality for CSKY
- Copyright (C) 2022-2024 Free Software Foundation, Inc.
+ Copyright (C) 2022-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/i386-linux-tdesc.c b/gdb/arch/i386-linux-tdesc.c
index 9f12e59..bd736eb 100644
--- a/gdb/arch/i386-linux-tdesc.c
+++ b/gdb/arch/i386-linux-tdesc.c
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux i386.
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -25,32 +25,35 @@
/* See arch/i386-linux-tdesc.h. */
const target_desc *
-i386_linux_read_description (uint64_t xcr0)
+i386_linux_read_description (uint64_t xstate_bv)
{
- /* Cache of previously seen i386 target descriptions, indexed by the xcr0
- value that created the target description. This needs to be static
- within this function to ensure it is initialised before first use. */
+ /* Cache of previously seen i386 target descriptions, indexed by the
+ xstate_bv value that created the target description. This
+ needs to be static within this function to ensure it is initialised
+ before first use. */
static std::unordered_map<uint64_t, const target_desc_up> i386_tdesc_cache;
- /* Only some bits are checked when creating a tdesc, but the XCR0 value
- contains other feature bits that are not relevant for tdesc creation.
- When indexing into the I386_TDESC_CACHE we need to use a consistent
- xcr0 value otherwise we might fail to find an existing tdesc which has
- the same set of relevant bits set. */
- xcr0 &= x86_linux_i386_xcr0_feature_mask ();
+ /* Only some bits are checked when creating a tdesc, but the
+ XSTATE_BV value contains other feature bits that are not relevant
+ for tdesc creation. When indexing into the I386_TDESC_CACHE
+ we need to use a consistent XSTATE_BV value otherwise we might fail
+ to find an existing tdesc which has the same set of relevant bits
+ set. */
+ xstate_bv &= x86_linux_i386_xstate_bv_feature_mask ();
- const auto it = i386_tdesc_cache.find (xcr0);
+ const auto it = i386_tdesc_cache.find (xstate_bv);
if (it != i386_tdesc_cache.end ())
return it->second.get ();
/* Create the previously unseen target description. */
- target_desc_up tdesc (i386_create_target_description (xcr0, true, false));
+ target_desc_up tdesc
+ (i386_create_target_description (xstate_bv, true, false));
x86_linux_post_init_tdesc (tdesc.get (), false);
/* Add to the cache, and return a pointer borrowed from the
target_desc_up. This is safe as the cache (and the pointers contained
within it) are not deleted until GDB exits. */
target_desc *ptr = tdesc.get ();
- i386_tdesc_cache.emplace (xcr0, std::move (tdesc));
+ i386_tdesc_cache.emplace (xstate_bv, std::move (tdesc));
return ptr;
}
diff --git a/gdb/arch/i386-linux-tdesc.h b/gdb/arch/i386-linux-tdesc.h
index 4ecd674..1cf2931 100644
--- a/gdb/arch/i386-linux-tdesc.h
+++ b/gdb/arch/i386-linux-tdesc.h
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux i386.
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -22,8 +22,9 @@
struct target_desc;
-/* Return the i386 target description corresponding to XCR0. */
+/* Return the i386 target description corresponding to XSTATE_BV. */
-extern const struct target_desc *i386_linux_read_description (uint64_t xcr0);
+extern const struct target_desc *i386_linux_read_description
+ (uint64_t xstate_bv);
#endif /* GDB_ARCH_I386_LINUX_TDESC_H */
diff --git a/gdb/arch/i386.c b/gdb/arch/i386.c
index 2072eae..4ec4f10 100644
--- a/gdb/arch/i386.c
+++ b/gdb/arch/i386.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -28,11 +28,13 @@
#include "../features/i386/32bit-avx512.c"
#include "../features/i386/32bit-segments.c"
#include "../features/i386/pkeys.c"
+#include "../features/i386/32bit-ssp.c"
-/* Create i386 target descriptions according to XCR0. */
+/* See arch/i386.h. */
target_desc *
-i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
+i386_create_target_description (uint64_t xstate_bv, bool is_linux,
+ bool segments)
{
target_desc_up tdesc = allocate_target_description ();
@@ -44,10 +46,10 @@ i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
long regnum = 0;
- if (xcr0 & X86_XSTATE_X87)
+ if (xstate_bv & X86_XSTATE_X87)
regnum = create_feature_i386_32bit_core (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_SSE)
+ if (xstate_bv & X86_XSTATE_SSE)
regnum = create_feature_i386_32bit_sse (tdesc.get (), regnum);
if (is_linux)
@@ -56,14 +58,17 @@ i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
if (segments)
regnum = create_feature_i386_32bit_segments (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_AVX)
+ if (xstate_bv & X86_XSTATE_AVX)
regnum = create_feature_i386_32bit_avx (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_AVX512)
+ if (xstate_bv & X86_XSTATE_AVX512)
regnum = create_feature_i386_32bit_avx512 (tdesc.get (), regnum);
- if (xcr0 & X86_XSTATE_PKRU)
+ if (xstate_bv & X86_XSTATE_PKRU)
regnum = create_feature_i386_pkeys (tdesc.get (), regnum);
+ if (xstate_bv & X86_XSTATE_CET_U)
+ regnum = create_feature_i386_32bit_ssp (tdesc.get (), regnum);
+
return tdesc.release ();
}
diff --git a/gdb/arch/i386.h b/gdb/arch/i386.h
index 1b5cc6e..91a581f 100644
--- a/gdb/arch/i386.h
+++ b/gdb/arch/i386.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -21,7 +21,12 @@
#include "gdbsupport/tdesc.h"
#include <stdint.h>
-target_desc *i386_create_target_description (uint64_t xcr0, bool is_linux,
+/* Create i386 target descriptions according to XSTATE_BV. If IS_LINUX is
+ true, create target descriptions for Linux. If SEGMENTS is true, then
+ include the "org.gnu.gdb.i386.segments" feature registers. */
+
+target_desc *i386_create_target_description (uint64_t xstate_bv,
+ bool is_linux,
bool segments);
#endif /* GDB_ARCH_I386_H */
diff --git a/gdb/arch/loongarch-insn.h b/gdb/arch/loongarch-insn.h
index afab10a..c94c082 100644
--- a/gdb/arch/loongarch-insn.h
+++ b/gdb/arch/loongarch-insn.h
@@ -1,6 +1,6 @@
/* Target-dependent code for LoongArch
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
diff --git a/gdb/arch/loongarch-syscall.h b/gdb/arch/loongarch-syscall.h
index c6a0136..af1da4e 100644
--- a/gdb/arch/loongarch-syscall.h
+++ b/gdb/arch/loongarch-syscall.h
@@ -1,6 +1,6 @@
/* Target-dependent code for LoongArch
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
diff --git a/gdb/arch/loongarch.c b/gdb/arch/loongarch.c
index 04b6dfc..25e698d 100644
--- a/gdb/arch/loongarch.c
+++ b/gdb/arch/loongarch.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2022-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2022-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -16,7 +16,6 @@
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "loongarch.h"
-#include <stdlib.h>
#include <unordered_map>
/* Target description features. */
diff --git a/gdb/arch/loongarch.h b/gdb/arch/loongarch.h
index 07f37d8..251099c 100644
--- a/gdb/arch/loongarch.h
+++ b/gdb/arch/loongarch.h
@@ -1,6 +1,6 @@
/* Common target-dependent functionality for LoongArch
- Copyright (C) 2022-2024 Free Software Foundation, Inc.
+ Copyright (C) 2022-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/ppc-linux-common.c b/gdb/arch/ppc-linux-common.c
index 0a6915c..2088b76 100644
--- a/gdb/arch/ppc-linux-common.c
+++ b/gdb/arch/ppc-linux-common.c
@@ -1,6 +1,6 @@
/* Common target dependent code for GNU/Linux on PPC systems.
- Copyright (C) 2018-2024 Free Software Foundation, Inc.
+ Copyright (C) 2018-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/ppc-linux-common.h b/gdb/arch/ppc-linux-common.h
index 1f72b29..fd4722c 100644
--- a/gdb/arch/ppc-linux-common.h
+++ b/gdb/arch/ppc-linux-common.h
@@ -1,6 +1,6 @@
/* Common target dependent code for GNU/Linux on PPC systems.
- Copyright (C) 2018-2024 Free Software Foundation, Inc.
+ Copyright (C) 2018-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/ppc-linux-tdesc.h b/gdb/arch/ppc-linux-tdesc.h
index bde6ba2..1ff316a 100644
--- a/gdb/arch/ppc-linux-tdesc.h
+++ b/gdb/arch/ppc-linux-tdesc.h
@@ -1,6 +1,6 @@
/* Target description declarations shared between gdb, gdbserver and IPA.
- Copyright (C) 2018-2024 Free Software Foundation, Inc.
+ Copyright (C) 2018-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/riscv.c b/gdb/arch/riscv.c
index 9a84844..c698fa2 100644
--- a/gdb/arch/riscv.c
+++ b/gdb/arch/riscv.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2018-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2018-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -16,7 +16,6 @@
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "riscv.h"
-#include <stdlib.h>
#include <unordered_map>
#include "../features/riscv/32bit-cpu.c"
diff --git a/gdb/arch/riscv.h b/gdb/arch/riscv.h
index bf65b0b..bc95e72 100644
--- a/gdb/arch/riscv.h
+++ b/gdb/arch/riscv.h
@@ -1,6 +1,6 @@
/* Common target-dependent functionality for RISC-V
- Copyright (C) 2018-2024 Free Software Foundation, Inc.
+ Copyright (C) 2018-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/tic6x.c b/gdb/arch/tic6x.c
index b8a722b..5724305 100644
--- a/gdb/arch/tic6x.c
+++ b/gdb/arch/tic6x.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/tic6x.h b/gdb/arch/tic6x.h
index efb3282..6120892 100644
--- a/gdb/arch/tic6x.h
+++ b/gdb/arch/tic6x.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2017-2024 Free Software Foundation, Inc.
+/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/x86-linux-tdesc-features.c b/gdb/arch/x86-linux-tdesc-features.c
index f6eb112..bc34378 100644
--- a/gdb/arch/x86-linux-tdesc-features.c
+++ b/gdb/arch/x86-linux-tdesc-features.c
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux x86 (i386 and x86-64).
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -28,18 +28,21 @@
We want to cache target descriptions, and this is currently done in
three separate caches, one each for i386, amd64, and x32. Additionally,
- the caching we're discussing here is Linux only, and for Linux, the only
- thing that has an impact on target description creation is the xcr0
- value.
-
- In order to ensure the cache functions correctly we need to filter out
- only those xcr0 feature bits that are relevant, we can then cache target
- descriptions based on the relevant feature bits. Two xcr0 values might
- be different, but have the same relevant feature bits. In this case we
- would expect the two xcr0 values to map to the same cache entry. */
+ the caching we're discussing here is Linux only. Currently for Linux,
+ the only thing that has an impact on target description creation are
+ the supported features in xsave which are modelled by a xstate_bv
+ value, which has the same format than the state component bitmap.
+
+ In order to ensure the cache functions correctly we need to filter only
+ those xstate_bv feature bits that are relevant, we can then cache
+ target descriptions based on the relevant feature bits. Two xstate_bv
+ values might be different, but have the same relevant feature bits. In
+ this case we would expect the two xstate_bv values to map to the same
+ cache entry. */
struct x86_xstate_feature {
- /* The xstate feature mask. This is a mask against an xcr0 value. */
+ /* The xstate feature mask. This is a mask against the state component
+ bitmap. */
uint64_t feature;
/* Is this feature checked when creating an i386 target description. */
@@ -56,12 +59,13 @@ struct x86_xstate_feature {
checked when building a target description for i386, amd64, or x32.
If in the future, due to simplifications or refactoring, this table ever
- ends up with 'true' for every xcr0 feature on every target type, then this
- is an indication that this table should probably be removed, and that the
- rest of the code in this file can be simplified. */
+ ends up with 'true' for every xsave feature on every target type, then
+ this is an indication that this table should probably be removed, and
+ that the rest of the code in this file can be simplified. */
static constexpr x86_xstate_feature x86_linux_all_xstate_features[] = {
/* Feature, i386, amd64, x32. */
+ { X86_XSTATE_CET_U, false, true, true },
{ X86_XSTATE_PKRU, true, true, true },
{ X86_XSTATE_AVX512, true, true, true },
{ X86_XSTATE_AVX, true, true, true },
@@ -73,7 +77,7 @@ static constexpr x86_xstate_feature x86_linux_all_xstate_features[] = {
that are checked for when building an i386 target description. */
static constexpr uint64_t
-x86_linux_i386_xcr0_feature_mask_1 ()
+x86_linux_i386_xstate_bv_feature_mask_1 ()
{
uint64_t mask = 0;
@@ -88,7 +92,7 @@ x86_linux_i386_xcr0_feature_mask_1 ()
that are checked for when building an amd64 target description. */
static constexpr uint64_t
-x86_linux_amd64_xcr0_feature_mask_1 ()
+x86_linux_amd64_xstate_bv_feature_mask_1 ()
{
uint64_t mask = 0;
@@ -103,7 +107,7 @@ x86_linux_amd64_xcr0_feature_mask_1 ()
that are checked for when building an x32 target description. */
static constexpr uint64_t
-x86_linux_x32_xcr0_feature_mask_1 ()
+x86_linux_x32_xstate_bv_feature_mask_1 ()
{
uint64_t mask = 0;
@@ -117,25 +121,25 @@ x86_linux_x32_xcr0_feature_mask_1 ()
/* See arch/x86-linux-tdesc-features.h. */
uint64_t
-x86_linux_i386_xcr0_feature_mask ()
+x86_linux_i386_xstate_bv_feature_mask ()
{
- return x86_linux_i386_xcr0_feature_mask_1 ();
+ return x86_linux_i386_xstate_bv_feature_mask_1 ();
}
/* See arch/x86-linux-tdesc-features.h. */
uint64_t
-x86_linux_amd64_xcr0_feature_mask ()
+x86_linux_amd64_xstate_bv_feature_mask ()
{
- return x86_linux_amd64_xcr0_feature_mask_1 ();
+ return x86_linux_amd64_xstate_bv_feature_mask_1 ();
}
/* See arch/x86-linux-tdesc-features.h. */
uint64_t
-x86_linux_x32_xcr0_feature_mask ()
+x86_linux_x32_xstate_bv_feature_mask ()
{
- return x86_linux_x32_xcr0_feature_mask_1 ();
+ return x86_linux_x32_xstate_bv_feature_mask_1 ();
}
#ifdef GDBSERVER
@@ -143,7 +147,7 @@ x86_linux_x32_xcr0_feature_mask ()
/* See arch/x86-linux-tdesc-features.h. */
int
-x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0)
+x86_linux_xstate_bv_to_tdesc_idx (uint64_t xstate_bv)
{
/* The following table shows which features are checked for when creating
the target descriptions (see nat/x86-linux-tdesc.c), the feature order
@@ -160,7 +164,7 @@ x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0)
for (int i = 0; i < ARRAY_SIZE (x86_linux_all_xstate_features); ++i)
{
- if ((xcr0 & x86_linux_all_xstate_features[i].feature)
+ if ((xstate_bv & x86_linux_all_xstate_features[i].feature)
== x86_linux_all_xstate_features[i].feature)
idx |= (1 << i);
}
@@ -250,17 +254,17 @@ x86_linux_i386_tdesc_count ()
/* See arch/x86-linux-tdesc-features.h. */
uint64_t
-x86_linux_tdesc_idx_to_xcr0 (int idx)
+x86_linux_tdesc_idx_to_xstate_bv (int idx)
{
- uint64_t xcr0 = 0;
+ uint64_t xstate_bv = 0;
for (int i = 0; i < ARRAY_SIZE (x86_linux_all_xstate_features); ++i)
{
if ((idx & (1 << i)) != 0)
- xcr0 |= x86_linux_all_xstate_features[i].feature;
+ xstate_bv |= x86_linux_all_xstate_features[i].feature;
}
- return xcr0;
+ return xstate_bv;
}
#endif /* IN_PROCESS_AGENT */
diff --git a/gdb/arch/x86-linux-tdesc-features.h b/gdb/arch/x86-linux-tdesc-features.h
index cf8351d..bc72727 100644
--- a/gdb/arch/x86-linux-tdesc-features.h
+++ b/gdb/arch/x86-linux-tdesc-features.h
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux x86 (i386 and x86-64).
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
@@ -27,17 +27,20 @@
the set of features which are checked for when creating the target
description for each of amd64, x32, and i386. */
-extern uint64_t x86_linux_amd64_xcr0_feature_mask ();
-extern uint64_t x86_linux_x32_xcr0_feature_mask ();
-extern uint64_t x86_linux_i386_xcr0_feature_mask ();
+extern uint64_t x86_linux_amd64_xstate_bv_feature_mask ();
+extern uint64_t x86_linux_x32_xstate_bv_feature_mask ();
+extern uint64_t x86_linux_i386_xstate_bv_feature_mask ();
#ifdef GDBSERVER
-/* Convert an xcr0 value into an integer. The integer will be passed from
- gdbserver to the in-process-agent where it will then be passed through
- x86_linux_tdesc_idx_to_xcr0 to get back the original xcr0 value. */
+/* Convert an XSTATE_BV value into an integer. XSTATE_BV has the same
+ format than the state component bitmap and does include user and
+ supervisor state components. The integer will be passed from gdbserver
+ to the in-process-agent where it will then be passed through
+ x86_linux_tdesc_idx_to_xstate_bv to get back the original value. */
-extern int x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0);
+
+extern int x86_linux_xstate_bv_to_tdesc_idx (uint64_t xstate_bv);
#endif /* GDBSERVER */
@@ -51,11 +54,13 @@ extern int x86_linux_amd64_tdesc_count ();
extern int x86_linux_x32_tdesc_count ();
extern int x86_linux_i386_tdesc_count ();
-/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx)
- into an xcr0 value which can then be used to create a target
- description. */
+/* Convert an index number (as returned from
+ x86_linux_xstate_bv_to_tdesc_idx) into an xstate_bv value which can
+ then be used to create a target description.
+ The return mask has the same format than the state component bitmap
+ and does include user and supervisor state components. */
-extern uint64_t x86_linux_tdesc_idx_to_xcr0 (int idx);
+extern uint64_t x86_linux_tdesc_idx_to_xstate_bv (int idx);
#endif /* IN_PROCESS_AGENT */
diff --git a/gdb/arch/x86-linux-tdesc.h b/gdb/arch/x86-linux-tdesc.h
index 718060c..0de2648 100644
--- a/gdb/arch/x86-linux-tdesc.h
+++ b/gdb/arch/x86-linux-tdesc.h
@@ -1,6 +1,6 @@
/* Target description related code for GNU/Linux x86 (i386 and x86-64).
- Copyright (C) 2024 Free Software Foundation, Inc.
+ Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GDB.
diff --git a/gdb/arch/xtensa.h b/gdb/arch/xtensa.h
index 70167b3..2f5b5a0 100644
--- a/gdb/arch/xtensa.h
+++ b/gdb/arch/xtensa.h
@@ -1,6 +1,6 @@
/* Common Target-dependent code for the Xtensa port of GDB, the GNU debugger.
- Copyright (C) 2003-2024 Free Software Foundation, Inc.
+ Copyright (C) 2003-2025 Free Software Foundation, Inc.
This file is part of GDB.