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-rw-r--r--gas/NEWS8
-rw-r--r--gas/as.c6
-rw-r--r--gas/as.h26
-rw-r--r--gas/config/tc-aarch64.c4
-rw-r--r--gas/config/tc-arc.h2
-rw-r--r--gas/config/tc-arm.h3
-rw-r--r--gas/config/tc-csky.h2
-rw-r--r--gas/config/tc-msp430.h3
-rw-r--r--gas/config/tc-ppc.h3
-rw-r--r--gas/config/tc-s390.h3
-rw-r--r--gas/config/tc-sparc.h2
-rw-r--r--gas/config/tc-tic6x.h4
-rw-r--r--gas/doc/c-aarch64.texi20
-rw-r--r--gas/dw2gencfi.c11
-rw-r--r--gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1.d2
-rw-r--r--gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.d5
-rw-r--r--gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.s3
-rw-r--r--gas/testsuite/gas/cfi-sframe/cfi-sframe.exp1
18 files changed, 84 insertions, 24 deletions
diff --git a/gas/NEWS b/gas/NEWS
index 0caaa2d..a985893 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -56,6 +56,14 @@ Changes in 2.45:
* For LoongArch, warn about negative right-shift amounts and
division/modulus-by-zero when evaluating expressions.
+* Add support for most Armv9.6 extensions, enabled by the option
+ `-march=armv9.6-a' and extensions '+cmpbr', '+f8f16mm', '+f8f32mm',
+ '+fprcvt', '+lsfe', '+lsui', '+occmo', '+pops', '+sme2p2', '+ssve-aes',
+ '+sve-aes', '+sve-aes2', '+sve-bfscale', '+sve-f16f32mm' and '+sve2p2'.
+
+* AArch64 system registers can now be assembled without restriction. The
+ previous behavior can be enabled with '-menable-sysreg-checking'.
+
Changes in 2.44:
* Add support for the x86 Intel Diamond Rapids AMX instructions, including
diff --git a/gas/as.c b/gas/as.c
index bc38cdf..58ed0a5 100644
--- a/gas/as.c
+++ b/gas/as.c
@@ -1042,14 +1042,14 @@ This program has absolutely no warranty.\n"));
if (optarg)
{
if (strcasecmp (optarg, "no") == 0)
- flag_gen_sframe = 0;
+ flag_gen_sframe = GEN_SFRAME_DISABLED;
else if (strcasecmp (optarg, "yes") == 0)
- flag_gen_sframe = 1;
+ flag_gen_sframe = GEN_SFRAME_ENABLED;
else
as_fatal (_("Invalid --gsframe option: `%s'"), optarg);
}
else
- flag_gen_sframe = 1;
+ flag_gen_sframe = GEN_SFRAME_ENABLED;
break;
#endif /* OBJ_ELF */
diff --git a/gas/as.h b/gas/as.h
index 872c6dd..8f2facb 100644
--- a/gas/as.h
+++ b/gas/as.h
@@ -355,8 +355,30 @@ COMMON int flag_execstack;
/* TRUE if .note.GNU-stack section with SEC_CODE should be created */
COMMON int flag_noexecstack;
-/* TRUE if .sframe section should be created. */
-COMMON int flag_gen_sframe;
+/* PR gas/33175.
+ Add enumerators to disambiguate between configure-time
+ enablement (or not) vs user-specficied enablement/disablement (the latter
+ via command line). The expected usage of these states is:
+ - user-specified command line takes precedence over configure-time
+ setting and .cfi_sections directive usage.
+ - .cfi_sections usage takes precedence over configure-time setting. */
+enum gen_sframe_option
+{
+ /* Default. SFrame generation not enabled at configure time. GNU as will
+ not generate SFrame sections by default, unless enabled by user via
+ command line. */
+ GEN_SFRAME_DEFAULT_NONE,
+ /* SFrame generation enabled at configure time. GNU as will generate SFrame
+ sections for all objects, unless disabled by user via command line. */
+ GEN_SFRAME_CONFIG_ENABLED,
+ /* User specified disablement via --gsframe=no. */
+ GEN_SFRAME_DISABLED,
+ /* User specified enablement via --gsframe or --gsframe=yes. */
+ GEN_SFRAME_ENABLED,
+};
+
+/* State of the setting for SFrame section creation. */
+COMMON enum gen_sframe_option flag_gen_sframe;
/* name of emitted object file */
COMMON const char *out_file_name;
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index cd9ae58..96bfe74 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10869,8 +10869,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"sme-b16b16", AARCH64_FEATURE (SME_B16B16),
AARCH64_FEATURES (2, SVE_B16B16, SME2)},
{"pops", AARCH64_FEATURE (PoPS), AARCH64_NO_FEATURES},
- {"sve2p2", AARCH64_FEATURE (SVE2p2), AARCH64_FEATURE (SVE2)},
- {"sme2p2", AARCH64_FEATURE (SME2p2), AARCH64_FEATURE (SME2)},
+ {"sve2p2", AARCH64_FEATURE (SVE2p2), AARCH64_FEATURE (SVE2p1)},
+ {"sme2p2", AARCH64_FEATURE (SME2p2), AARCH64_FEATURE (SME2p1)},
{NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
};
diff --git a/gas/config/tc-arc.h b/gas/config/tc-arc.h
index 145d955..65470f0 100644
--- a/gas/config/tc-arc.h
+++ b/gas/config/tc-arc.h
@@ -271,4 +271,4 @@ struct arc_relax_type
extern void arc_md_end (void);
#define md_end arc_md_end
-#endif
+#endif /* TC_ARC */
diff --git a/gas/config/tc-arm.h b/gas/config/tc-arm.h
index aa5f117..4148a6f 100644
--- a/gas/config/tc-arm.h
+++ b/gas/config/tc-arm.h
@@ -20,6 +20,7 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
+#ifndef TC_ARM
#define TC_ARM 1
#ifndef TARGET_BYTES_BIG_ENDIAN
@@ -377,3 +378,5 @@ extern bool arm_tc_equal_in_insn (int, char *);
#define TC_LARGEST_EXPONENT_IS_NORMAL(PRECISION) \
arm_is_largest_exponent_ok ((PRECISION))
int arm_is_largest_exponent_ok (int precision);
+
+#endif /* TC_ARM */
diff --git a/gas/config/tc-csky.h b/gas/config/tc-csky.h
index 7e32347..d391084 100644
--- a/gas/config/tc-csky.h
+++ b/gas/config/tc-csky.h
@@ -106,4 +106,4 @@ extern long csky_relax_frag (segT, fragS *, long);
const char * elf32_csky_target_format (void);
#endif
-#endif
+#endif /* TC_CSKY */
diff --git a/gas/config/tc-msp430.h b/gas/config/tc-msp430.h
index 47da4aa..fc39a59 100644
--- a/gas/config/tc-msp430.h
+++ b/gas/config/tc-msp430.h
@@ -20,6 +20,7 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
+#ifndef TC_MSP430
#define TC_MSP430
/* By convention, you should define this macro in the `.h' file. For
example, `tc-m68k.h' defines `TC_M68K'. You might have to use this
@@ -172,3 +173,5 @@ extern bool msp430_allow_local_subtract (expressionS *, expressionS *, segT);
#define TC_LINKRELAX_FIXUP(seg) ((seg->flags & SEC_CODE) || (seg->flags & SEC_DEBUGGING))
#define DWARF2_ADDR_SIZE(bfd) 4
+
+#endif /* TC_MSP430 */
diff --git a/gas/config/tc-ppc.h b/gas/config/tc-ppc.h
index 97e2f4e..e568c42 100644
--- a/gas/config/tc-ppc.h
+++ b/gas/config/tc-ppc.h
@@ -19,6 +19,7 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
+#ifndef TC_PPC
#define TC_PPC
#include "opcode/ppc.h"
@@ -367,3 +368,5 @@ extern int ppc_dwarf2_line_min_insn_length;
#define DWARF2_DEFAULT_RETURN_COLUMN 0x41
#define DWARF2_CIE_DATA_ALIGNMENT ppc_cie_data_alignment
#define EH_FRAME_ALIGNMENT 2
+
+#endif /* TC_PPC */
diff --git a/gas/config/tc-s390.h b/gas/config/tc-s390.h
index c92769e..0c62125 100644
--- a/gas/config/tc-s390.h
+++ b/gas/config/tc-s390.h
@@ -19,6 +19,7 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
+#ifndef TC_S390
#define TC_S390
struct fix;
@@ -129,3 +130,5 @@ extern offsetT s390_sframe_cfa_ra_offset (void);
/* The abi/arch identifier for SFrame. */
unsigned char s390_sframe_get_abi_arch (void);
#define sframe_get_abi_arch s390_sframe_get_abi_arch
+
+#endif /* TC_S390 */
diff --git a/gas/config/tc-sparc.h b/gas/config/tc-sparc.h
index d569fe7..cfb89e0 100644
--- a/gas/config/tc-sparc.h
+++ b/gas/config/tc-sparc.h
@@ -178,4 +178,4 @@ extern int sparc_cie_data_alignment;
this, BFD_RELOC_32_PCREL will be emitted directly instead. */
#define CFI_DIFF_EXPR_OK 0
-#endif
+#endif /* TC_SPARC */
diff --git a/gas/config/tc-tic6x.h b/gas/config/tc-tic6x.h
index 55f2b2c..5859333 100644
--- a/gas/config/tc-tic6x.h
+++ b/gas/config/tc-tic6x.h
@@ -18,7 +18,9 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
+#ifndef TC_TIC6X
#define TC_TIC6X 1
+
#define TARGET_BYTES_BIG_ENDIAN 0
#define WORKING_DOT_WORD
#define DOUBLEBAR_PARALLEL
@@ -225,3 +227,5 @@ struct fde_entry;
void tic6x_cfi_endproc (struct fde_entry *fde);
#define tc_cfi_section_name ".c6xabi.exidx"
+
+#endif /* TC_TIC6X */
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index dc64e09..8f5702f 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -197,6 +197,8 @@ automatically cause those extensions to be disabled.
@tab Enable 8-bit floating-point matrix multiply-accumulate to half-precision instructions.
@item @code{f8f32mm} @tab @code{simd} @code{fp}
@tab Enable 8-bit floating-point matrix multiply-accumulate to single-precision instructions.
+@item @code{faminmax} @tab @code{simd}
+ @tab Enable the famin and famax instructions.
@item @code{fcma} @tab @code{fp16}, @code{simd}
@tab Enable the complex number SIMD extensions.
@item @code{flagm} @tab
@@ -243,7 +245,7 @@ automatically cause those extensions to be disabled.
@tab Enable Large System Float Extension.
@item @code{lsui} @tab
@tab Enable Unprivileged Load/Store instructions.
-@item @code{lut} @tab
+@item @code{lut} @tab @code{simd}
@tab Enable the Lookup Table (LUT) extension.
@item @code{memtag} @tab
@tab Enable Armv8.5-A Memory Tagging Extensions.
@@ -258,9 +260,9 @@ automatically cause those extensions to be disabled.
@item @code{pops} @tab
@tab Enable Point of Physical Storage.
@item @code{predres} @tab
- @tab Enable the Execution and Data and Prediction instructions.
+ @tab Enable execution and data prediction restriction instructions.
@item @code{predres2} @tab @code{predres}
- @tab Enable Prediction instructions.
+ @tab Enable additional prediction restriction instructions.
@item @code{profile} @tab
@tab Enable statistical profiling extensions.
@item @code{ras} @tab
@@ -297,6 +299,8 @@ automatically cause those extensions to be disabled.
@tab Enable the SME F8F16 Extension.
@item @code{sme-f8f32} @tab @code{sme2}, @code{fp8}
@tab Enable the SME F8F32 Extension.
+@item @code{sme-f16f16} @tab @code{sme2}
+ @tab Enable the SME2 F16F16 Extension.
@item @code{sme-f64f64} @tab @code{sme}
@tab Enable SME F64F64 Extension.
@item @code{sme-i16i64} @tab @code{sme}
@@ -311,10 +315,10 @@ automatically cause those extensions to be disabled.
@tab Enable SME2.2.
@item @code{ssbs} @tab
@tab Enable Speculative Store Bypassing Safe state read and write.
-@item @code{ssve-fp8dot2} @tab @code{sme2}, @code{fp8}
- @tab Enable the Streaming SVE FP8 2-way dot product instructions.
@item @code{ssve-aes} @tab @code{sme2}, @code{sve-aes}
@tab Enable SVE AES instructions in streaming mode.
+@item @code{ssve-fp8dot2} @tab @code{sme2}, @code{fp8}
+ @tab Enable the Streaming SVE FP8 2-way dot product instructions.
@item @code{ssve-fp8dot4} @tab @code{sme2}, @code{fp8}
@tab Enable the Streaming SVE FP8 4-way dot product instructions.
@item @code{ssve-fp8fma} @tab @code{sme2}, @code{fp8}
@@ -322,7 +326,7 @@ automatically cause those extensions to be disabled.
@item @code{sve} @tab @code{fcma}
@tab Enable the Scalable Vector Extension.
@item @code{sve-aes} @tab @code{aes}
- @tab Enable the SVE PMULL128 instructions.
+ @tab Enable the SVE2 AES and PMULL Extensions.
@item @code{sve-aes2} @tab
@tab Enable the SVE-AES2 extension.
@item @code{sve-b16b16} @tab
@@ -333,7 +337,7 @@ automatically cause those extensions to be disabled.
@tab Enable the SVE_F16F32MM extension.
@item @code{sve2} @tab @code{sve}
@tab Enable SVE2.
-@item @code{sve2-aes} @tab @code{sve2}, @code{aes}
+@item @code{sve2-aes} @tab @code{sve2}, @code{sve-aes}
@tab Enable the SVE2 AES and PMULL Extensions.
@item @code{sve2-bitperm} @tab @code{sve2}
@tab Enable the SVE2 BITPERM Extension.
@@ -353,8 +357,6 @@ automatically cause those extensions to be disabled.
@tab Enable @code{wfet} and @code{wfit} instructions.
@item @code{xs} @tab
@tab Enable the XS memory attribute extension.
-@item @code{sme-f16f16} @tab
- @tab Enable the SME2 F16F16 Extension.
@end multitable
@multitable @columnfractions .20 .80
diff --git a/gas/dw2gencfi.c b/gas/dw2gencfi.c
index 57fffab..c28856c 100644
--- a/gas/dw2gencfi.c
+++ b/gas/dw2gencfi.c
@@ -2596,10 +2596,13 @@ cfi_finish (void)
flag_traditional_format = save_flag_traditional_format;
}
- /* Generate SFrame section if the user specifies:
- - the command line option to gas, or
- - .sframe in the .cfi_sections directive. */
- if (flag_gen_sframe || (all_cfi_sections & CFI_EMIT_sframe) != 0)
+ /* Generate SFrame section if the user:
+ - enables via the command line option, or
+ - specifies .sframe in the .cfi_sections directive and does not disable
+ via the command line. */
+ if (flag_gen_sframe == GEN_SFRAME_ENABLED
+ || ((all_cfi_sections & CFI_EMIT_sframe) != 0
+ && flag_gen_sframe != GEN_SFRAME_DISABLED))
{
#ifdef support_sframe_p
if (support_sframe_p () && !SUPPORT_FRAME_LINKONCE)
diff --git a/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1.d b/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1.d
index 8c74680..9c341b4 100644
--- a/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1.d
+++ b/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1.d
@@ -1,4 +1,4 @@
-#as: --gsframe
+#as:
#objdump: --sframe=.sframe
#name: SFrame generation using CFI directive .cfi_sections
#...
diff --git a/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.d b/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.d
new file mode 100644
index 0000000..3493d58
--- /dev/null
+++ b/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.d
@@ -0,0 +1,5 @@
+#as: --gsframe=no
+#readelf: -S
+#name: No SFrame section with explicit --gsframe=no
+#failif
+[ ]*\[.*\][ ]+\.sframe[ ]+GNU_SFRAME.*
diff --git a/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.s b/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.s
new file mode 100644
index 0000000..ac9c6ca
--- /dev/null
+++ b/gas/testsuite/gas/cfi-sframe/cfi-sframe-common-1c.s
@@ -0,0 +1,3 @@
+ .cfi_sections .sframe
+ .cfi_startproc
+ .cfi_endproc
diff --git a/gas/testsuite/gas/cfi-sframe/cfi-sframe.exp b/gas/testsuite/gas/cfi-sframe/cfi-sframe.exp
index 82669cd..9380c98 100644
--- a/gas/testsuite/gas/cfi-sframe/cfi-sframe.exp
+++ b/gas/testsuite/gas/cfi-sframe/cfi-sframe.exp
@@ -36,6 +36,7 @@ if { ([istarget "x86_64-*-*"] || [istarget "aarch64*-*-*"]
run_dump_test "cfi-sframe-common-1"
run_dump_test "cfi-sframe-common-1b"
+ run_dump_test "cfi-sframe-common-1c"
run_dump_test "cfi-sframe-common-2"
run_dump_test "cfi-sframe-common-3"
run_dump_test "cfi-sframe-common-4"
generated by cgit v1.1 at 2025-07-28 16:47:06 +0000