diff options
| author | Michael Snyder <msnyder@vmware.com> | 2003-07-18 00:10:41 +0000 |
|---|---|---|
| committer | Michael Snyder <msnyder@vmware.com> | 2003-07-18 00:10:41 +0000 |
| commit | 55acb21b1fb8e65c8b2f713e9414f3b4a06498a4 (patch) | |
| tree | 0554fdc13caaa0a5f77b83361eb9ffac425dbaed /sim/h8300 | |
| parent | 0f42aa719da7ba1e3fa6d093f3ea8cda2c25b3f9 (diff) | |
| download | binutils-55acb21b1fb8e65c8b2f713e9414f3b4a06498a4.zip binutils-55acb21b1fb8e65c8b2f713e9414f3b4a06498a4.tar.gz binutils-55acb21b1fb8e65c8b2f713e9414f3b4a06498a4.tar.bz2 | |
2003-07-17 Michael Snyder <msnyder@redhat.com>
* compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg.
Diffstat (limited to 'sim/h8300')
| -rw-r--r-- | sim/h8300/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/h8300/compile.c | 18 |
2 files changed, 12 insertions, 10 deletions
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index 77cb912..2436aba 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,6 +1,8 @@ 2003-07-17 Michael Snyder <msnyder@redhat.com> - * compile.c (decode): IMM16 is always zero-extended. + * compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg. + (decode): IMM16 is always zero-extended. + 2003-06-24 Michael Snyder <msnyder@redhat.com> diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 3819fdd..e25b3f7 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -3153,10 +3153,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (fetch2 (sd, &code->dst, &rd)) goto end; - if (code->src.type == X (OP_IMM, SB)) + if (memcmp (&code->src, &code->dst, sizeof (code->src)) == 0) + ea = 1; /* unary op */ + else /* binary op */ fetch (sd, &code->src, &ea); - else - ea = 1; if (code->opcode == O (O_SHLL, SB)) { @@ -3177,10 +3177,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (fetch2 (sd, &code->dst, &rd)) goto end; - if (code->src.type == X (OP_IMM, SW)) - fetch (sd, &code->src, &ea); + if (memcmp (&code->src, &code->dst, sizeof (code->src)) == 0) + ea = 1; /* unary op */ else - ea = 1; + fetch (sd, &code->src, &ea); if (code->opcode == O (O_SHLL, SW)) { @@ -3201,10 +3201,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (fetch2 (sd, &code->dst, &rd)) goto end; - if (code->src.type == X (OP_IMM, SL)) - fetch (sd, &code->src, &ea); + if (memcmp (&code->src, &code->dst, sizeof (code->src)) == 0) + ea = 1; /* unary op */ else - ea = 1; + fetch (sd, &code->src, &ea); if (code->opcode == O (O_SHLL, SL)) { |