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| author | Andrea Corallo <andrea.corallo@arm.com> | 2023-09-12 11:23:52 +0100 |
|---|---|---|
| committer | Andrea Corallo <andrea.corallo@arm.com> | 2023-12-19 15:35:49 +0100 |
| commit | db168da2e0d7ea01d0a8ed4bdd0e035e47094fed (patch) | |
| tree | 3eee402784b784b8f65d91a16c0ea9640cf47d47 /opcodes | |
| parent | 88b5a8ae138f3ace20f63635dbaea437fb17ae78 (diff) | |
| download | binutils-db168da2e0d7ea01d0a8ed4bdd0e035e47094fed.zip binutils-db168da2e0d7ea01d0a8ed4bdd0e035e47094fed.tar.gz binutils-db168da2e0d7ea01d0a8ed4bdd0e035e47094fed.tar.bz2 | |
aarch64: Add FEAT_ECBHB support
This patch add support for FEAT_ECBHB "Exploitative control using
branch history information" adding the "clrbhb" instruction. AFAIU
the same alias was originally added as "clearbhb" before the
architecture was finalized (Mandatory v8.9-a/v9.4-a; Optional
v8.0-a+/v9.0-a+).
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/aarch64-asm-2.c | 1 | ||||
| -rw-r--r-- | opcodes/aarch64-dis-2.c | 3 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 4 |
3 files changed, 7 insertions, 1 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index ae0119a..e9b9ce2 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -426,6 +426,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode) case 1200: /* movz */ value = 1200; /* --> movz. */ break; + case 3193: /* clrbhb */ case 1276: /* autibsp */ case 1275: /* autibz */ case 1274: /* autiasp */ diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c index 38d72a7..977b1c1 100644 --- a/opcodes/aarch64-dis-2.c +++ b/opcodes/aarch64-dis-2.c @@ -31321,7 +31321,7 @@ aarch64_find_alias_opcode (const aarch64_opcode *opcode) case 1136: value = 1185; break; /* lduminl --> stuminl. */ case 1198: value = 1199; break; /* movn --> mov. */ case 1200: value = 1201; break; /* movz --> mov. */ - case 1215: value = 1276; break; /* hint --> autibsp. */ + case 1215: value = 3193; break; /* hint --> clrbhb. */ case 1235: value = 1239; break; /* dsb --> pssbb. */ case 1236: value = 1236; break; /* dsb --> dsb. */ case 1254: value = 1264; break; /* sys --> cosp. */ @@ -31481,6 +31481,7 @@ aarch64_find_next_alias_opcode (const aarch64_opcode *opcode) case 1185: value = 1136; break; /* stuminl --> lduminl. */ case 1199: value = 1198; break; /* mov --> movn. */ case 1201: value = 1200; break; /* mov --> movz. */ + case 3193: value = 1276; break; /* clrbhb --> autibsp. */ case 1276: value = 1275; break; /* autibsp --> autibz. */ case 1275: value = 1274; break; /* autibz --> autiasp. */ case 1274: value = 1273; break; /* autiasp --> autiaz. */ diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 4ef28be..6734794 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -6113,6 +6113,10 @@ const struct aarch64_opcode aarch64_opcode_table[] = CSSC_INSN ("smin", 0x1ac06800, 0x7fe0fc00, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF), CSSC_INSN ("umin", 0x1ac06c00, 0x7fe0fc00, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF), + /* FEAT_CLRBHB part of the hint space and available without special + command-line flags. */ + CORE_INSN ("clrbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS), + {0, 0, 0, 0, 0, 0, {}, {}, 0, 0, 0, NULL}, }; |