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authorJan Beulich <jbeulich@suse.com>2024-05-29 10:03:00 +0200
committerJan Beulich <jbeulich@suse.com>2024-05-29 10:03:00 +0200
commitb83021de7a83a353b5e9ad1ef428aec05846803e (patch)
tree91d022f8d2ee2dc65187bcb34480ccbb718fbb91 /opcodes/i386-opc.h
parent6ccf16c19d318bae09b7b405825285f7579d820f (diff)
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x86/Intel: warn about undue mnemonic suffixes
Except for very few insns mnemonic suffixes aren't permitted in Intel syntax. Warn about such for now, indicating that they will be outright refused down the road. While fiddling with testcases to address fallout, drop a few things which should never have been tested as valid Intel syntax. Also add a previously missing line to simd-suffix.d.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index b63ad7c..295ae4c 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -733,6 +733,9 @@ enum
#define ATT_MNEMONIC 3
Dialect,
+ /* Mnemonic suffix permitted in Intel syntax. */
+ IntelSuffix,
+
/* ISA64: Don't change the order without other code adjustments.
0: Common to AMD64 and Intel64.
1: AMD64.
@@ -800,6 +803,7 @@ typedef struct i386_opcode_modifier
unsigned int disp8memshift:3;
unsigned int optimize:1;
unsigned int dialect:2;
+ unsigned int intelsuffix:1;
unsigned int isa64:2;
unsigned int noegpr:1;
unsigned int nf:1;