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authorJan Beulich <jbeulich@suse.com>2022-11-30 09:06:33 +0100
committerJan Beulich <jbeulich@suse.com>2022-11-30 09:06:33 +0100
commitac9226cf8c496b15e369b2fcae95066f4a597a5b (patch)
treeee5644700ceb123597f406bfc9a09dbf29a7ca62 /opcodes/i386-opc.h
parent3df781c5a459249fcb49e20ee36bdcd7bf111f0c (diff)
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x86: drop FloatR
There are just 4 templates using it, which can be easily identified by other means, as D is set only on a very limited number of FPU templates. Also move the respective conditional out of the code path taken by all "reverse match" insns (it probably should have been this way already before, to avoid the one conditional in the common case). With this the templates which had FloatR dropped no longer differ from their AT&T syntax + mnemonic counterparts - the only difference is now which of the two would be recognized. For this, however, we don't need two templates - we can simply arrange the condition for setting Opcode_FloatR accordingly.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 459268f..6f4c27b 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -487,8 +487,6 @@ enum
Jump,
/* FP insn memory format bit, sized by 0x4 */
FloatMF,
- /* src/dest swap for floats. */
- FloatR,
/* needs size prefix if in 32-bit mode */
#define SIZE16 1
/* needs size prefix if in 16-bit mode */
@@ -743,7 +741,6 @@ typedef struct i386_opcode_modifier
unsigned int modrm:1;
unsigned int jump:3;
unsigned int floatmf:1;
- unsigned int floatr:1;
unsigned int size:2;
unsigned int checkregsize:1;
unsigned int operandconstraint:4;