x86: split insn templates' CPU field

Right now the opcode table has entries with ISA restrictions of the form
FEAT1|FEAT2, the meaning of which depends on context and requires
special treatment in tc-i386.c: Sometimes this means "both features
requires", whereas originally it was intended to solely mean "all of
these features required". Split the field, with the original one
regaining its original meaning. The new field now truly means "any of
these". The combination of both fields is still and &&-type check, i.e.
(all of these) && (any of these). In the opcode table more involved
combinations of features then also need expressing this way: "all"
entities first, follow by "any" entities enclosed in parentheses, e.g.
x64&(AVX|AVX512F). If the "all" part is empty, parentheses may not be
added around the "any" part (unless parsing logic was further relaxed).

Note that this way AVX512VL no longer needs as much special treatment,
and hence templates previously using AVX512F|AVX512VL are switched to
just AVX512VL.

Note further that this requires FMA handling as resulting from
da0784f961d8 ("x86: fold FMA VEX and EVEX templates") to be slightly
re-done: FMA now becomes more similar to AVX and AVX2.

1 files changed, 1 insertions, 1 deletions

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 529eb7c..7bb8084 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -1014,7 +1014,7 @@ typedef struct insn_template
   i386_opcode_modifier opcode_modifier;
 
   /* cpu feature attributes */
-  i386_cpu_attr cpu;
+  i386_cpu_attr cpu, cpu_any;
 
   /* operand_types[i] describes the type of operand i.  This is made
      by OR'ing together all of the possible type masks.  (e.g.