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authorHu, Lin1 <lin1.hu@intel.com>2023-10-31 16:23:53 +0800
committerHaochen Jiang <haochen.jiang@intel.com>2023-10-31 16:24:41 +0800
commit8170af78e17e1ec8b14b40d3ff4c979ccccb8f44 (patch)
tree9ea06e982f648cd3c3d8848ea913ef8f8d9e815f /opcodes/i386-opc.h
parent1f9e9ea5b7cd1554db5a5e9da92a6882f1cce40e (diff)
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Support Intel USER_MSR
This patches aims to support Intel USER_MSR. In addition to the usual support, this patch includes encoding and decoding support for MAP7 and immediate numbers as the last operand (ATT style). gas/ChangeLog: * NEWS: Support Intel USER_MSR. * config/tc-i386.c (smallest_imm_type): Reject imm32 in 64bit mode. (build_vex_prefix): Add VEXMAP7. (md_assemble): Handling the imm32 of USER_MSR. (match_template): Handling the unusual immediate. * doc/c-i386.texi: Document .user_msr. * testsuite/gas/i386/i386.exp: Run USER_MSR tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/user_msr-inval.l: New test. * testsuite/gas/i386/user_msr-inval.s: Ditto. * testsuite/gas/i386/x86-64-user_msr-intel.d: Ditto. * testsuite/gas/i386/x86-64-user_msr-inval.l: Ditto. * testsuite/gas/i386/x86-64-user_msr-inval.s: Ditto. * testsuite/gas/i386/x86-64-user_msr.d: Ditto. * testsuite/gas/i386/x86-64-user_msr.s: Ditto. opcodes/ChangeLog: * i386-dis.c (struct instr_info): Add a new attribute has_skipped_modrm. (Gq): New. (Rq): Ditto. (q_mm_mode): Ditto. (Nq): Change mode from q_mode to q_mm_mode. (VEX_LEN_TABLE): (get_valid_dis386): Add VEX_MAP7 in VEX prefix. and handle the map7_f8 for save space. (OP_Skip_MODRM): Set has_skipped_modrm. (OP_E): Skip codep++ when has skipped modrm byte. (OP_R): Support q_mode and q_mm_mode. (REG_VEX_MAP7_F8_L_0_W_0): New. (PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64): Ditto. (X86_64_VEX_MAP7_F8_L_0_W_0_R_0): Ditto. (VEX_LEN_MAP7_F8): Ditto. (VEX_W_MAP7_F8_L_0): Ditto. (MOD_0F38F8): Ditto. (PREFIX_0F38F8_M_0): Ditto. (PREFIX_0F38F8_M_1_X86_64): Ditto. (X86_64_0F38F8_M_1): Ditto. (PREFIX_0F38F8): Remove. (prefix_table): Add PREFIX_0F38F8_M_1_X86_64. Remove PREFIX_0F38F8. (reg_table): Add REG_VEX_MAP7_F8_L_0_W_0, PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64. (x86_64_table): Add X86_64_0F38F8_PREFIX_3_M_1, X86_64_VEX_MAP7_F8_L_0_W_0_R_0 and X86_64_0F38F8_M_1. (vex_table): Add VEX_MAP7. (vex_len_table): Add VEX_LEN_MAP7_F8, VEX_W_MAP7_F8_L_0. (mod_table): New entry for USER_MSR and add MOD_0F38F8. * i386-gen.c (cpu_flag_init): Add CPU_USER_MSR_FLAGS and CPU_ANY_USER_MSR_FLAGS. Add add VEXMAP7. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (SPACE_VEXMAP7): New. (CPU_USER_MSR_FLAGS): Ditoo. (CPU_ANY_USER_MSR_FLAGS): Ditto. (i386_cpu_flags): Add cpuuser_msr. * i386-opc.tbl: Add USER_MSR instructions. * i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 149ae0e..529eb7c 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -223,6 +223,8 @@ enum i386_cpu
CpuFRED,
/* lkgs instruction required */
CpuLKGS,
+ /* Intel USER_MSR Instruction support required. */
+ CpuUSER_MSR,
/* mwaitx instruction required */
CpuMWAITX,
/* Clzero instruction required */
@@ -471,6 +473,7 @@ typedef union i386_cpu_flags
unsigned int cpurao_int:1;
unsigned int cpufred:1;
unsigned int cpulkgs:1;
+ unsigned int cpuuser_msr:1;
unsigned int cpumwaitx:1;
unsigned int cpuclzero:1;
unsigned int cpuospke:1;
@@ -966,6 +969,7 @@ typedef struct insn_template
3: 0F3A opcode prefix / space.
5: EVEXMAP5 opcode prefix / space.
6: EVEXMAP6 opcode prefix / space.
+ 7: VEXMAP7 opcode prefix / space.
8: XOP 08 opcode space.
9: XOP 09 opcode space.
A: XOP 0A opcode space.
@@ -976,6 +980,7 @@ typedef struct insn_template
#define SPACE_0F3A 3
#define SPACE_EVEXMAP5 5
#define SPACE_EVEXMAP6 6
+#define SPACE_VEXMAP7 7
#define SPACE_XOP08 8
#define SPACE_XOP09 9
#define SPACE_XOP0A 0xA