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author | Claudiu Zissulescu <claziss@gmail.com> | 2023-09-25 10:55:51 +0300 |
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committer | Claudiu Zissulescu <claziss@gmail.com> | 2023-09-25 10:55:51 +0300 |
commit | c99dc76089a2de97ea0ee755aa8e87037a17b6d6 (patch) | |
tree | 9ced921df582321875ef28acd9e37024c82d87e2 /opcodes/arc-regs.h | |
parent | f3d38d7d0b7346515ba603454feeddc58a3fc451 (diff) | |
download | binutils-c99dc76089a2de97ea0ee755aa8e87037a17b6d6.zip binutils-c99dc76089a2de97ea0ee755aa8e87037a17b6d6.tar.gz binutils-c99dc76089a2de97ea0ee755aa8e87037a17b6d6.tar.bz2 |
arc: Add new opcode functions for ARCv3 ISA.
opcodes/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
Cupertino Miranda <cmiranda@synopsys.com>
* opcodes/Makefile.am: Add ARC64 opcode file.
* opcodes/Makefile.in: Regenerate.
* opcodes/arc-opc.c: Move the common functionality to
arcxx-opc.inc. Keep only ARCv2 ARCv1 specifics.
* opcodes/arc-ext-tbl.h: Deleted file.
* opcodes/arcxx-opc.inc: New file.
* opcodes/arc64-opc.c: Likewise.
* opcodes/arc-fxi.h (insert_uimm9_a32_11_s): New function.
(extract_uimm9_a32_11_s): Likewise.
(insert_uimm10_13_s): Likewise.
(extract_uimm10_13_s): Likewise.
* opcodes/configure: Regenerate.
* opcodes/configure.ac: Add ARC64 target.
* opcodes/disassemble.c: Likewise.
* opcodes/arc-dis.c (regmod_t): New type.
(regmods): New structure.
(fpnames): New strings with fp-regs name.
(REG_PCL, REG_LIMM, REG_LIMM_S, REG_U32, REG_S32): New defines.
(getregname): New function.
(find_format_from_table): Discriminate between signed and unsigned
32bit immediates.
(find_format): Handle extract function for flags.
(arc_insn_length): Update insn lengths to various architectures.
(print_insn_arc): Update printing for various ARC architectures.
* opcodes/arc-flag-classes.def: New file.
* opcodes/arc-flag.def: New file.
* opcodes/arc-operands.def: New file.
* opcodes/arc-regs.h: Changed.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Diffstat (limited to 'opcodes/arc-regs.h')
-rw-r--r-- | opcodes/arc-regs.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/opcodes/arc-regs.h b/opcodes/arc-regs.h index 2699ce8..9864f16 100644 --- a/opcodes/arc-regs.h +++ b/opcodes/arc-regs.h @@ -208,7 +208,7 @@ DEF (0xad, ARC_OPCODE_ARCALL, NONE, se_watch) DEF (0xc0, ARC_OPCODE_ARCALL, NONE, bpu_build) DEF (0xc1, ARC_OPCODE_ARC600, NONE, arc600_build_config) DEF (0xc1, ARC_OPCODE_ARC700, NONE, isa_config) -DEF (0xc1, ARC_OPCODE_ARCV2, NONE, isa_config) +DEF (0xc1, ARC_OPCODE_ARCVx, NONE, isa_config) DEF (0xf4, ARC_OPCODE_ARCALL, NONE, hwp_build) DEF (0xf5, ARC_OPCODE_ARCALL, NONE, pct_build) DEF (0xf6, ARC_OPCODE_ARCALL, NONE, cc_build) @@ -346,11 +346,17 @@ DEF (0x451, ARC_OPCODE_ARC600, NONE, wake) DEF (0x452, ARC_OPCODE_ARC600, NONE, dvfs_performance) DEF (0x453, ARC_OPCODE_ARC600, NONE, pwr_ctrl) DEF (0x460, ARC_OPCODE_ARCv2HS, NONE, tlbpd0) +DEF (0x460, ARC_OPCODE_ARC64, NONE, mmu_rtp0_lo) DEF (0x461, ARC_OPCODE_ARCv2HS, NONE, tlbpd1) +DEF (0x461, ARC_OPCODE_ARC64, NONE, mmu_rtp0_hi) +DEF (0x462, ARC_OPCODE_ARC64, NONE, mmu_rtp1_lo) +DEF (0x463, ARC_OPCODE_ARC64, NONE, mmu_rtp1_hi) DEF (0x464, ARC_OPCODE_ARCv2HS, NONE, tlbindex) DEF (0x465, ARC_OPCODE_ARCv2HS, NONE, tlbcommand) DEF (0x468, ARC_OPCODE_ARCv2HS, NONE, pid) DEF (0x46c, ARC_OPCODE_ARCv2HS, NONE, scratch_data0) +DEF (0x468, ARC_OPCODE_ARC64, NONE, mmu_ctrl) +DEF (0x469, ARC_OPCODE_ARC64, NONE, mmu_ttbc) DEF (0x500, ARC_OPCODE_ARC700, NONE, aux_vlc_buf_idx) DEF (0x501, ARC_OPCODE_ARC700, NONE, aux_vlc_read_buf) DEF (0x502, ARC_OPCODE_ARC700, NONE, aux_vlc_valid_bits) |