diff options
author | Lulu Cai <cailulu@loongson.cn> | 2024-01-25 19:20:00 +0800 |
---|---|---|
committer | liuzhensong <liuzhensong@loongson.cn> | 2024-03-06 14:47:03 +0800 |
commit | a9859f5ad0ed35ffd937c4900957f54e4893a35b (patch) | |
tree | c26f5e24ac28abea62900d3e3f0bc3827335f799 /ld | |
parent | d5de762be734940049f1fc77d7b7bad2ee5f06f7 (diff) | |
download | binutils-a9859f5ad0ed35ffd937c4900957f54e4893a35b.zip binutils-a9859f5ad0ed35ffd937c4900957f54e4893a35b.tar.gz binutils-a9859f5ad0ed35ffd937c4900957f54e4893a35b.tar.bz2 |
LoongArch: Fix some test cases for TLS transition and relax
Diffstat (limited to 'ld')
27 files changed, 292 insertions, 122 deletions
diff --git a/ld/testsuite/ld-loongarch-elf/desc-ie.d b/ld/testsuite/ld-loongarch-elf/desc-ie.d index 32e3505..e1f49e2 100644 --- a/ld/testsuite/ld-loongarch-elf/desc-ie.d +++ b/ld/testsuite/ld-loongarch-elf/desc-ie.d @@ -1,5 +1,5 @@ #as: -#ld: -shared -z norelro -e 0x0 --hash-style=both +#ld: -shared -z norelro --hash-style=both #objdump: -dr #skip: loongarch32-*-* @@ -7,10 +7,8 @@ Disassembly of section .text: -0+230 <fn1>: - 230: 1a000084 pcalau12i \$a0, 4 - 234: 28cd6084 ld.d \$a0, \$a0, 856 - 238: 03400000 nop.* - 23c: 03400000 nop.* - 240: 1a000084 pcalau12i \$a0, 4 - 244: 28cd6081 ld.d \$ra, \$a0, 856 +[0-9a-f]+ <fn1>: + +[0-9a-f]+: 1a000084 pcalau12i \$a0, .* + +[0-9a-f]+: 28cca084 ld.d \$a0, \$a0, .* + +[0-9a-f]+: 1a000084 pcalau12i \$a0, .* + +[0-9a-f]+: 28cca084 ld.d \$a0, \$a0, .* diff --git a/ld/testsuite/ld-loongarch-elf/desc-ie.s b/ld/testsuite/ld-loongarch-elf/desc-ie.s index 7f5772b..441080b 100644 --- a/ld/testsuite/ld-loongarch-elf/desc-ie.s +++ b/ld/testsuite/ld-loongarch-elf/desc-ie.s @@ -1,6 +1,6 @@ - .global v1 + .global var .section .tdata,"awT",@progbits -v1: +var: .word 1 .text .global fn1 @@ -9,10 +9,5 @@ fn1: # Use DESC and IE to access the same symbol, # DESC will relax to IE. - pcalau12i $a0,%desc_pc_hi20(var) - addi.d $a0,$a0,%desc_pc_lo12(var) - ld.d $ra,$a0,%desc_ld(var) - jirl $ra,$ra,%desc_call(var) - - pcalau12i $a0,%ie_pc_hi20(var) - ld.d $ra,$a0,%ie_pc_lo12(var) + la.tls.ie $a0,var + la.tls.desc $a0,var diff --git a/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d b/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d new file mode 100644 index 0000000..5a53245 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/desc-le-norelax.d @@ -0,0 +1,15 @@ +#as: +#ld: -z norelro -e0 --no-relax +#objdump: -dr +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +[0-9a-f]+ <fn1>: + +[0-9a-f]+: 14000004 lu12i.w \$a0, .* + +[0-9a-f]+: 03800084 ori \$a0, \$a0, .* + +[0-9a-f]+: 03400000 nop + +[0-9a-f]+: 03400000 nop diff --git a/ld/testsuite/ld-loongarch-elf/desc-le-norelax.s b/ld/testsuite/ld-loongarch-elf/desc-le-norelax.s new file mode 100644 index 0000000..c91f15d --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/desc-le-norelax.s @@ -0,0 +1,11 @@ + .global var + .section .tdata,"awT",@progbits +var: + .word 1 + .text + .global fn1 + .type fn1,@function +fn1: + + # DESC will relax to LE. + la.tls.desc $a0,var diff --git a/ld/testsuite/ld-loongarch-elf/desc-le-relax.d b/ld/testsuite/ld-loongarch-elf/desc-le-relax.d new file mode 100644 index 0000000..03b5535 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/desc-le-relax.d @@ -0,0 +1,13 @@ +#as: +#ld: -z norelro -e0 +#objdump: -dr -M no-aliases +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +[0-9a-f]+ <fn1>: + +[0-9a-f]+: 03800004 ori \$a0, \$zero, 0x0 + +[0-9a-f]+: 03801004 ori \$a0, \$zero, 0x4 diff --git a/ld/testsuite/ld-loongarch-elf/desc-le-relax.s b/ld/testsuite/ld-loongarch-elf/desc-le-relax.s new file mode 100644 index 0000000..d590299 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/desc-le-relax.s @@ -0,0 +1,14 @@ + .global var + .section .tdata,"awT",@progbits +var1: + .word 1 +var2: + .word 1 + .text + .global fn1 + .type fn1,@function +fn1: + + # DESC will relax to LE. + la.tls.desc $a0,var1 + la.tls.desc $a0,var2 diff --git a/ld/testsuite/ld-loongarch-elf/desc-le.d b/ld/testsuite/ld-loongarch-elf/desc-le.d deleted file mode 100644 index b4ca9f8..0000000 --- a/ld/testsuite/ld-loongarch-elf/desc-le.d +++ /dev/null @@ -1,15 +0,0 @@ -#as: -#ld: -z norelro -e 0x0 -#objdump: -dr -#skip: loongarch32-*-* - -.*: file format .* - - -Disassembly of section .text: - -0+1200000e8 <fn1>: - 1200000e8: 14000004 lu12i.w \$a0, 0 - 1200000ec: 03800084 ori \$a0, \$a0, 0x0 - 1200000f0: 03400000 nop.* - 1200000f4: 03400000 nop.* diff --git a/ld/testsuite/ld-loongarch-elf/desc-le.s b/ld/testsuite/ld-loongarch-elf/desc-le.s deleted file mode 100644 index 9ffaa2d..0000000 --- a/ld/testsuite/ld-loongarch-elf/desc-le.s +++ /dev/null @@ -1,14 +0,0 @@ - .global var - .section .tdata,"awT",@progbits -var: - .word 1 - .text - .global fn1 - .type fn1,@function -fn1: - - # DESC will relax to LE. - pcalau12i $a0,%desc_pc_hi20(var) - addi.d $a0,$a0,%desc_pc_lo12(var) - ld.d $ra,$a0,%desc_ld(var) - jirl $ra,$ra,%desc_call(var) diff --git a/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d b/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d new file mode 100644 index 0000000..81d78ca --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/ie-le-norelax.d @@ -0,0 +1,13 @@ +#as: +#ld: -z norelro -e0 --no-relax +#objdump: -dr +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +[0-9a-f]+ <.*>: + +[0-9a-f]+: 14000024 lu12i.w \$a0, .* + +[0-9a-f]+: 03800084 ori \$a0, \$a0, .* diff --git a/ld/testsuite/ld-loongarch-elf/ie-le.s b/ld/testsuite/ld-loongarch-elf/ie-le-norelax.s index 795c7ce..db87a2d 100644 --- a/ld/testsuite/ld-loongarch-elf/ie-le.s +++ b/ld/testsuite/ld-loongarch-elf/ie-le-norelax.s @@ -1,5 +1,6 @@ .data .section .tdata,"awT",@progbits + .fill 0x1000,1,0 var: .word 1 .text @@ -7,5 +8,4 @@ var: .type gn1,@function fn1: # expect IE to relax LE. - pcalau12i $a0,%ie_pc_hi20(var) - ld.d $a0,$a0,%ie_pc_lo12(var) + la.tls.ie $a0,var diff --git a/ld/testsuite/ld-loongarch-elf/ie-le-relax.d b/ld/testsuite/ld-loongarch-elf/ie-le-relax.d new file mode 100644 index 0000000..03b5535 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/ie-le-relax.d @@ -0,0 +1,13 @@ +#as: +#ld: -z norelro -e0 +#objdump: -dr -M no-aliases +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +[0-9a-f]+ <fn1>: + +[0-9a-f]+: 03800004 ori \$a0, \$zero, 0x0 + +[0-9a-f]+: 03801004 ori \$a0, \$zero, 0x4 diff --git a/ld/testsuite/ld-loongarch-elf/ie-le-relax.s b/ld/testsuite/ld-loongarch-elf/ie-le-relax.s new file mode 100644 index 0000000..08bc398 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/ie-le-relax.s @@ -0,0 +1,13 @@ + .data + .section .tdata,"awT",@progbits +var1: + .word 1 +var2: + .word 2 + .text + .global fn1 + .type gn1,@function +fn1: + # expect IE to relax LE + la.tls.ie $a0,var1 + la.tls.ie $a0,var2 diff --git a/ld/testsuite/ld-loongarch-elf/ie-le.d b/ld/testsuite/ld-loongarch-elf/ie-le.d deleted file mode 100644 index 42694d7..0000000 --- a/ld/testsuite/ld-loongarch-elf/ie-le.d +++ /dev/null @@ -1,13 +0,0 @@ -#as: -#ld: -z norelro -e 0x0 -#objdump: -dr -#skip: loongarch32-*-* - -.*: file format .* - - -Disassembly of section .text: - -0+1200000e8 <fn1>: - 1200000e8: 14000004 lu12i.w \$a0, 0 - 1200000ec: 03800084 ori \$a0, \$a0, 0x0 diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp index 27310fe..161cc1a 100644 --- a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp +++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp @@ -34,7 +34,6 @@ if [istarget "loongarch64-*-*"] { run_dump_test "local-ifunc-reloc" run_dump_test "anno-sym" run_dump_test "pcala64" - run_dump_test "tls-le" run_dump_test "overflow_s_10_5" run_dump_test "overflow_s_10_12" run_dump_test "overflow_s_10_16" @@ -51,6 +50,8 @@ if [istarget "loongarch64-*-*"] { run_dump_test "underflow_s_0_5_10_16_s2" run_dump_test "underflow_s_0_10_10_16_s2" run_dump_test "underflow_s_5_20" + run_dump_test "tls-le-norelax" + run_dump_test "tls-le-relax" } if [istarget "loongarch32-*-*"] { @@ -127,8 +128,6 @@ if [istarget "loongarch64-*-*"] { if [istarget "loongarch64-*-*"] { if [check_shared_lib_support] { run_dump_test "desc-ie" - run_dump_test "desc-le" - run_dump_test "ie-le" run_dump_test "tlsdesc-dso" run_dump_test "desc-norelax" run_dump_test "desc-relax" @@ -147,5 +146,11 @@ if [istarget "loongarch64-*-*"] { run_dump_test "underflow_b26" run_dump_test "underflow_pcrel20" run_dump_test "pie_discard" + run_dump_test "desc-le-norelax" + run_dump_test "desc-le-relax" + run_dump_test "ie-le-norelax" + run_dump_test "ie-le-relax" + run_dump_test "tlsdesc_abs" + run_dump_test "tlsdesc_extreme" } diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.d b/ld/testsuite/ld-loongarch-elf/macro_op.d index c949391..6a88622 100644 --- a/ld/testsuite/ld-loongarch-elf/macro_op.d +++ b/ld/testsuite/ld-loongarch-elf/macro_op.d @@ -140,12 +140,16 @@ Disassembly of section .text: [ ]+f0:[ ]+380c1484[ ]+ldx.d[ ]+\$a0, \$a0, \$a1 [ ]+f4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0, 0 [ ]+f4: R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+f4: R_LARCH_RELAX[ ]+\*ABS\* [ ]+f8:[ ]+03800084[ ]+ori[ ]+\$a0, \$a0, 0x0 [ ]+f8: R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+f8: R_LARCH_RELAX[ ]+\*ABS\* [ ]+fc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0, 0 [ ]+fc: R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+fc: R_LARCH_RELAX[ ]+\*ABS\* [ ]+100:[ ]+28c00084[ ]+ld.d[ ]+\$a0, \$a0, 0 [ ]+100: R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+100: R_LARCH_RELAX[ ]+\*ABS\* [ ]+104:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0, 0 [ ]+104: R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 [ ]+108:[ ]+02c00005[ ]+li.d[ ]+\$a1, 0 diff --git a/ld/testsuite/ld-loongarch-elf/relax.exp b/ld/testsuite/ld-loongarch-elf/relax.exp index f421e8a..7d95a9c 100644 --- a/ld/testsuite/ld-loongarch-elf/relax.exp +++ b/ld/testsuite/ld-loongarch-elf/relax.exp @@ -137,7 +137,7 @@ if [istarget loongarch64-*-*] { [list \ [list \ "loongarch old tls le .exe build" \ - "" "" \ + "--no-relax" "" \ "" \ {old-tls-le.s} \ {} \ @@ -158,7 +158,7 @@ if [istarget loongarch64-*-*] { [list \ [list \ "loongarch tls le realx compatible .exe build" \ - "" "" \ + "--no-relax" "" \ "" \ {tls-relax-compatible-check-new.s tls-relax-compatible-check-old.s} \ {} \ @@ -201,7 +201,7 @@ if [istarget loongarch64-*-*] { [list \ [list \ "loongarch tls le realx bound-check .exe build" \ - "" "" \ + "--no-relax" "" \ "" \ {relax-bound-check-tls-le.s} \ {} \ diff --git a/ld/testsuite/ld-loongarch-elf/tls-le-norelax.d b/ld/testsuite/ld-loongarch-elf/tls-le-norelax.d new file mode 100644 index 0000000..a53d812 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tls-le-norelax.d @@ -0,0 +1,18 @@ +#ld: --no-relax +#objdump: -d -M no-aliases + +.*:[ ]+file format .* + + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: 14000004 lu12i.w \$a0, 0 + +[0-9a-f]+: 03802085 ori \$a1, \$a0, 0x8 + +[0-9a-f]+: 14000004 lu12i.w \$a0, 0 + +[0-9a-f]+: 02c02085 addi.d \$a1, \$a0, 8 + +[0-9a-f]+: 14000004 lu12i.w \$a0, 0 + +[0-9a-f]+: 03802084 ori \$a0, \$a0, 0x8 + +[0-9a-f]+: 16000004 lu32i.d \$a0, 0 + +[0-9a-f]+: 03000084 lu52i.d \$a0, \$a0, 0 + +[0-9a-f]+: 4c000020 jirl \$zero, \$ra, 0 diff --git a/ld/testsuite/ld-loongarch-elf/tls-le.s b/ld/testsuite/ld-loongarch-elf/tls-le-norelax.s index 2e6a9de..80f8792 100644 --- a/ld/testsuite/ld-loongarch-elf/tls-le.s +++ b/ld/testsuite/ld-loongarch-elf/tls-le-norelax.s @@ -15,4 +15,8 @@ _start: ori $r5,$r4,%le_lo12(a + 0x8) lu12i.w $r4,%le_hi20_r(a + 0x8) addi.d $r5,$r4,%le_lo12_r(a + 0x8) + lu12i.w $r4,%le_hi20(a + 0x8) + ori $r4,$r4,%le_lo12(a + 0x8) + lu32i.d $r4,%le64_lo20(a + 0x8) + lu52i.d $r4,$r4,%le64_hi12(a + 0x8) jr $ra diff --git a/ld/testsuite/ld-loongarch-elf/tls-le-relax.d b/ld/testsuite/ld-loongarch-elf/tls-le-relax.d new file mode 100644 index 0000000..19e101c --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tls-le-relax.d @@ -0,0 +1,13 @@ +#ld: +#objdump: -d -M no-aliases + +.*:[ ]+file format .* + + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: 03802005 ori \$a1, \$zero, 0x8 + +[0-9a-f]+: 02c02045 addi.d \$a1, \$tp, 8 + +[0-9a-f]+: 03802004 ori \$a0, \$zero, 0x8 + +[0-9a-f]+: 4c000020 jirl \$zero, \$ra, 0 diff --git a/ld/testsuite/ld-loongarch-elf/tls-le-relax.s b/ld/testsuite/ld-loongarch-elf/tls-le-relax.s new file mode 100644 index 0000000..80f8792 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tls-le-relax.s @@ -0,0 +1,22 @@ +# Support for TLS LE symbols with addend + .text + .globl a + .section .tdata,"awT",@progbits + .align 2 + .type a, @object + .size a, 4 +a: + .word 123 + + .text + .global _start +_start: + lu12i.w $r4,%le_hi20(a + 0x8) + ori $r5,$r4,%le_lo12(a + 0x8) + lu12i.w $r4,%le_hi20_r(a + 0x8) + addi.d $r5,$r4,%le_lo12_r(a + 0x8) + lu12i.w $r4,%le_hi20(a + 0x8) + ori $r4,$r4,%le_lo12(a + 0x8) + lu32i.d $r4,%le64_lo20(a + 0x8) + lu52i.d $r4,$r4,%le64_hi12(a + 0x8) + jr $ra diff --git a/ld/testsuite/ld-loongarch-elf/tls-le.d b/ld/testsuite/ld-loongarch-elf/tls-le.d deleted file mode 100644 index cbd6adb..0000000 --- a/ld/testsuite/ld-loongarch-elf/tls-le.d +++ /dev/null @@ -1,14 +0,0 @@ -#ld: --no-relax -#objdump: -d - -.*:[ ]+file format .* - - -Disassembly of section .text: - -[ ]*00000001200000e8 <_start>: -[ ]+1200000e8:[ ]+14000004[ ]+lu12i.w[ ]+\$a0, 0 -[ ]+1200000ec:[ ]+03802085[ ]+ori[ ]+\$a1, \$a0, 0x8 -[ ]+1200000f0:[ ]+14000004[ ]+lu12i.w[ ]+\$a0, 0 -[ ]+1200000f4:[ ]+02c02085[ ]+addi.d[ ]+\$a1, \$a0, 8 -[ ]+1200000f8:[ ]+4c000020[ ]+ret diff --git a/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d b/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d index 453902d..84ea97e 100644 --- a/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d +++ b/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d @@ -8,49 +8,53 @@ Disassembly of section .text: -0+418 <fun_gl1>: - 418: 180214c4 pcaddi \$a0, 4262 - 41c: 1a000084 pcalau12i \$a0, 4 - 420: 28db0084 ld.d \$a0, \$a0, 1728 - 424: 180212a4 pcaddi \$a0, 4245 - 428: 18021304 pcaddi \$a0, 4248 - 42c: 28c00081 ld.d \$ra, \$a0, 0 - 430: 4c000021 jirl \$ra, \$ra, 0 - 434: 1a000084 pcalau12i \$a0, 4 - 438: 28d9c084 ld.d \$a0, \$a0, 1648 - 43c: 03400000 nop.* - 440: 03400000 nop.* - 444: 1a000084 pcalau12i \$a0, 4 - 448: 28d9c084 ld.d \$a0, \$a0, 1648 - 44c: 18021264 pcaddi \$a0, 4243 - 450: 18021244 pcaddi \$a0, 4242 - 454: 28c00081 ld.d \$ra, \$a0, 0 - 458: 4c000021 jirl \$ra, \$ra, 0 - 45c: 1a000084 pcalau12i \$a0, 4 - 460: 28daa084 ld.d \$a0, \$a0, 1704 - -0+464 <fun_lo>: +0+448 <fun_gl1>: + 448: 18021584 pcaddi \$a0, 4268 + 44c: 1a000084 pcalau12i \$a0, 4 + 450: 28dc2084 ld.d \$a0, \$a0, 1800 + 454: 18021364 pcaddi \$a0, 4251 + 458: 180213c4 pcaddi \$a0, 4254 + 45c: 28c00081 ld.d \$ra, \$a0, 0 + 460: 4c000021 jirl \$ra, \$ra, 0 464: 1a000084 pcalau12i \$a0, 4 - 468: 28d86084 ld.d \$a0, \$a0, 1560 - 46c: 18020ce4 pcaddi \$a0, 4199 - 470: 18020e04 pcaddi \$a0, 4208 - 474: 28c00081 ld.d \$ra, \$a0, 0 - 478: 4c000021 jirl \$ra, \$ra, 0 - 47c: 18020d24 pcaddi \$a0, 4201 - 480: 1a000084 pcalau12i \$a0, 4 - 484: 28d90084 ld.d \$a0, \$a0, 1600 - 488: 03400000 nop.* - 48c: 03400000 nop.* - 490: 1a000084 pcalau12i \$a0, 4 - 494: 28d90084 ld.d \$a0, \$a0, 1600 - 498: 18020d84 pcaddi \$a0, 4204 + 468: 28dae084 ld.d \$a0, \$a0, 1720 + 46c: 1a000084 pcalau12i \$a0, 4 + 470: 28dae084 ld.d \$a0, \$a0, 1720 + 474: 18021364 pcaddi \$a0, 4251 + 478: 18021344 pcaddi \$a0, 4250 + 47c: 28c00081 ld.d \$ra, \$a0, 0 + 480: 4c000021 jirl \$ra, \$ra, 0 + 484: 1a000084 pcalau12i \$a0, 4 + 488: 28dbc084 ld.d \$a0, \$a0, 1776 + +0+48c <fun_lo>: + 48c: 1a000084 pcalau12i \$a0, 4 + 490: 28d98084 ld.d \$a0, \$a0, 1632 + 494: 18020de4 pcaddi \$a0, 4207 + 498: 18020f04 pcaddi \$a0, 4216 49c: 28c00081 ld.d \$ra, \$a0, 0 4a0: 4c000021 jirl \$ra, \$ra, 0 - 4a4: 18020d24 pcaddi \$a0, 4201 + 4a4: 18020e24 pcaddi \$a0, 4209 4a8: 1a000084 pcalau12i \$a0, 4 - 4ac: 28d96084 ld.d \$a0, \$a0, 1624 + 4ac: 28da2084 ld.d \$a0, \$a0, 1672 + 4b0: 1a000084 pcalau12i \$a0, 4 + 4b4: 28da2084 ld.d \$a0, \$a0, 1672 + 4b8: 18020ec4 pcaddi \$a0, 4214 + 4bc: 28c00081 ld.d \$ra, \$a0, 0 + 4c0: 4c000021 jirl \$ra, \$ra, 0 + 4c4: 18020e64 pcaddi \$a0, 4211 + 4c8: 1a000084 pcalau12i \$a0, 4 + 4cc: 28da8084 ld.d \$a0, \$a0, 1696 + +0+4d0 <fun_external>: + 4d0: 18020ec4 pcaddi \$a0, 4214 + 4d4: 28c00081 ld.d \$ra, \$a0, 0 + 4d8: 4c000021 jirl \$ra, \$ra, 0 -0+4b0 <fun_external>: - 4b0: 18020d84 pcaddi \$a0, 4204 - 4b4: 28c00081 ld.d \$ra, \$a0, 0 - 4b8: 4c000021 jirl \$ra, \$ra, 0 +0+4dc <fun_hidden>: + 4dc: 18021224 pcaddi \$a0, 4241 + 4e0: 28c00081 ld.d \$ra, \$a0, 0 + 4e4: 4c000021 jirl \$ra, \$ra, 0 + 4e8: 18021144 pcaddi \$a0, 4234 + 4ec: 28c00081 ld.d \$ra, \$a0, 0 + 4f0: 4c000021 jirl \$ra, \$ra, 0 diff --git a/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s b/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s index 936bbce..faadca6 100644 --- a/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s +++ b/ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s @@ -1,6 +1,8 @@ .data .section .tdata,"awT",@progbits .global gl1, gl2, gl3, gl4 + .global hd1, hd2 + .hidden hd1, hd2 gl1: .dword 1 gl2: .dword 2 gl3: .dword 3 @@ -9,6 +11,8 @@ lo1: .dword 10 lo2: .dword 20 lo3: .dword 30 lo4: .dword 40 +hd1: .dword 100 +hd2: .dword 200 .text # Access global symbol fun_gl1: @@ -63,3 +67,8 @@ fun_lo: # Access external undef symbol fun_external: la.tls.desc $a0, sH1 + +# Access hidden symbol +fun_hidden: + la.tls.desc $a0, hd1 + la.tls.desc $a0, hd2 diff --git a/ld/testsuite/ld-loongarch-elf/tlsdesc_abs.d b/ld/testsuite/ld-loongarch-elf/tlsdesc_abs.d new file mode 100644 index 0000000..62f5a2a --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tlsdesc_abs.d @@ -0,0 +1,23 @@ +#as: -mla-global-with-abs +#ld: --no-relax -e0 +#objdump: -dr +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+120000100 <.*>: + 120000100: 14400084 lu12i.w \$a0, .* + 120000104: 03850084 ori \$a0, \$a0, .* + 120000108: 16000024 lu32i.d \$a0, .* + 12000010c: 03000084 lu52i.d \$a0, \$a0, 0 + 120000110: 28c00081 ld.d \$ra, \$a0, 0 + 120000114: 4c000021 jirl \$ra, \$ra, 0 + 120000118: 14400084 lu12i.w \$a0, .* + 12000011c: 03850084 ori \$a0, \$a0, .* + 120000120: 16000024 lu32i.d \$a0, .* + 120000124: 03000084 lu52i.d \$a0, \$a0, 0 + 120000128: 28c00081 ld.d \$ra, \$a0, 0 + 12000012c: 4c000021 jirl \$ra, \$ra, 0 diff --git a/ld/testsuite/ld-loongarch-elf/tlsdesc_abs.s b/ld/testsuite/ld-loongarch-elf/tlsdesc_abs.s new file mode 100644 index 0000000..61ac9a8 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tlsdesc_abs.s @@ -0,0 +1,7 @@ + .section ".tdata", "awT", @progbits + .global var +var: .dword 1 + .text + # No matter which register the user uses, the abs macro expansion uses $a0 + la.tls.desc $a0,var + la.tls.desc $t0,var diff --git a/ld/testsuite/ld-loongarch-elf/tlsdesc_extreme.d b/ld/testsuite/ld-loongarch-elf/tlsdesc_extreme.d new file mode 100644 index 0000000..5517999 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tlsdesc_extreme.d @@ -0,0 +1,25 @@ +#as: -mla-global-with-pcrel +#ld: --no-relax -e0 +#objdump: -dr +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+120000100 <.*>: + 120000100: 1a000084 pcalau12i \$a0, .* + 120000104: 02c52001 li.d \$ra, .* + 120000108: 16000001 lu32i.d \$ra, 0 + 12000010c: 03000021 lu52i.d \$ra, \$ra, 0 + 120000110: 00108484 add.d \$a0, \$a0, \$ra + 120000114: 28c00081 ld.d \$ra, \$a0, 0 + 120000118: 4c000021 jirl \$ra, \$ra, 0 + 12000011c: 1a000084 pcalau12i \$a0, .* + 120000120: 02c5200d li.d \$t1, .* + 120000124: 1600000d lu32i.d \$t1, 0 + 120000128: 030001ad lu52i.d \$t1, \$t1, 0 + 12000012c: 0010b484 add.d \$a0, \$a0, \$t1 + 120000130: 28c00081 ld.d \$ra, \$a0, 0 + 120000134: 4c000021 jirl \$ra, \$ra, 0 diff --git a/ld/testsuite/ld-loongarch-elf/tlsdesc_extreme.s b/ld/testsuite/ld-loongarch-elf/tlsdesc_extreme.s new file mode 100644 index 0000000..3582692 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/tlsdesc_extreme.s @@ -0,0 +1,7 @@ + .section ".tdata", "awT", @progbits + .global var +var: .dword 1 + .text + # No matter which two registers are passed in, $a0 and $ra are always used + la.tls.desc $a0,$ra,var + la.tls.desc $t0,$t1,var |