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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:16 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:16 +0100 |
| commit | 3bd82c86f0f432bd7653101069bf056fda14b7cd (patch) | |
| tree | b26d522e496dcd5b402020c7843059de9a101e63 /include | |
| parent | adccc50753467ac66573471f180a60d8d96ce223 (diff) | |
| download | binutils-3bd82c86f0f432bd7653101069bf056fda14b7cd.zip binutils-3bd82c86f0f432bd7653101069bf056fda14b7cd.tar.gz binutils-3bd82c86f0f432bd7653101069bf056fda14b7cd.tar.bz2 | |
[binutils][aarch64] New iclass sve_size_hsd2.
Add "sve_size_hsd2" iclass decode that uses the new FLD_SVE_size field
value to determine the variant of an instruction.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_size_hsd2 iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_size_hsd2 iclass decode.
* aarch64-opc.c (fields): Handle SVE_size field.
* aarch64-opc.h (enum aarch64_field_kind): New SVE_size field.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 14415ed..cf24ee4 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,9 @@ 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> + * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass. + +2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> + * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand. 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index e392499..a7a7459 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -590,6 +590,7 @@ enum aarch64_insn_class sve_size_bhs, sve_size_bhsd, sve_size_hsd, + sve_size_hsd2, sve_size_sd, testbranch, cryptosm3, |