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authorJin Ma <jinma@linux.alibaba.com>2023-11-18 15:08:32 +0800
committerNelson Chu <nelson@rivosinc.com>2023-11-23 09:32:12 +0800
commit832cdeeccb063073ba2893ec63060773fc8b98ae (patch)
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RISC-V: Add vector mask instructions for T-Head VECTOR vendor extension
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds mask instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for mask instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VMPOPCM): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
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