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author | MayShao-oc <MayShao-oc@zhaoxin.com> | 2025-01-17 15:33:59 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2025-01-17 15:33:59 +0100 |
commit | 7965f0a0031c360ef9ce8c4ff01f422dd43b99b1 (patch) | |
tree | c3d719e839fdece2e7c1ebf3a4b9e795c6b0c726 /gdb/python/py-unwind.c | |
parent | 48984d3da79f340b814e43b6576993ea1a927f5a (diff) | |
download | binutils-7965f0a0031c360ef9ce8c4ff01f422dd43b99b1.zip binutils-7965f0a0031c360ef9ce8c4ff01f422dd43b99b1.tar.gz binutils-7965f0a0031c360ef9ce8c4ff01f422dd43b99b1.tar.bz2 |
x86: Add CpuGMISM2 and CpuGMICCS
There are separate CPUID feature bits for SM2 and CCS instructions.
CCS is the acronym of Chinese Cipher System, it includes SM3 and SM4
instructions. This patch adds CpuGMISM2 and CpuGMICCS to replace CpuGMI on
corresponding instructions.
gas/ChangeLog:
* config/tc-i386.c: Add gmism2 and gmiccs to replace gmi.
* doc/c-i386.texi: Ditto.
opcodes/ChangeLog:
* i386-gen.c: Add GMISM2 and GMICCS to replace GMI.
* i386-opc.h (enum i386_cpu): Add CpuGMISM2 and CpuGMICCS to
replace CpuGMI.
* i386-opc.tbl: Replace GMI with GMISM2 on sm2 instruction. Replace GMI
with GMICCS on sm3 and sm4 instructions.
* i386-tbl.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-init.h: Ditto.
Diffstat (limited to 'gdb/python/py-unwind.c')
0 files changed, 0 insertions, 0 deletions